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參數(shù)資料
| 型號： | LP5526TL |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 顯示驅(qū)動器 |
| 英文描述： | 4 Mbit Uniform Sector, Serial Flash Memory |
| 中文描述： | LED DISPLAY DRIVER, PBGA25 |
| 封裝： | 2.54 X 2.54 MM, 0.60 MM HEIGHT, 0.50 MM PITCH, BGA-25 |
| 文件頁數(shù)： | 5/33頁 |
| 文件大小： | 1150K |
| 代理商： | LP5526TL |
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Electrical Characteristics
(Notes 2, 8)
Limits in standard typeface are for T
J
= 25
o
C. Limits in
boldface
type apply over the operating ambient temperature range
(-30
o
C
<
T
A
<
+85
o
C). Unless otherwise noted, specifications apply to the LP5526 Block Diagram with: V
DD1,2
= 3.0 ... 5.5V,
C
VDD
= C
VDDIO
= 100nF, C
OUT
= 2 x 4.7μF, C
IN
= 10μF, C
VDDA
= 1μF, C
VREF
= 100nF, L1 = 10μH, R
RGB
= 2.4k
and R
RT
=
82k
(Note 9).
Symbol
Parameter
Condition
I
VDD
Standby supply current
(V
DD1
, V
DD2
)
Register 0DH=08H (Note 10)
No-boost supply current
(V
DD1
, V
DD2
)
EN_BOOST = L
No-load supply current
(V
DD1
, V
DD2
)
Autoload OFF
V
DDA
Output voltage of internal LDO
I
VDDA
= 1mA
Min
Typ
1.7
Max
7
Units
μA
NSTBY = L
NSTBY = H,
300
800
μA
NSTBY = H, EN_BOOST = H
780
1300
uA
2.80
V
%
V
-3
+3
V
REF
Reference voltage (Note 11)
1.23
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pins.
Note 3:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
=150
o
C (typ.) and disengages at
T
J
=130
o
C (typ.).
Note 4:
For detailed soldering specifications and information, please refer to National SemiconductorApplication NoteAN1112 : Micro SMD Wafer Level Chip Scale
Package
Note 5:
The Human body model is a 100pF capacitor discharged through a 1.5k
resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 6:
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
J-MAX-OP
= 125
o
C), the maximum power
dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the part/package in the application (
θ
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
– (
θ
JA
x P
D-MAX
).
Note 7:
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 8:
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9:
Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 10:
Boost output voltage set to 8V (08H in register 0DH) to prevent any unneccessary current consumption.
Note 11:
No external loading allowed for V
REF
pin.
L
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