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參數(shù)資料
| 型號： | LP3971 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| 中文描述： | 電源管理單元提供高級應(yīng)用處理器 |
| 文件頁數(shù)： | 17/42頁 |
| 文件大?。?/td> | 1350K |
| 代理商： | LP3971 |
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I
2
C Compatible Interface
(Continued)
20180715
TRANSFERRING DATA
Every byte put on the SDA line must be eight bits long, with
the most significant bit (MSB) being transferred first. The
number of bytes that can be transmitted per transfer is
unrestricted. Each byte of data has to be followed by an
acknowledge bit. The acknowledge related clock pulse is
generated by the master. The transmitter releases the SDA
line (HIGH) during the acknowledge clock pulse. The re-
ceiver must pull down the SDA line during the 9th clock
pulse, signifying an acknowledge.Areceiver which has been
addressed must generate an acknowledge after each byte
has been received.
After the START condition, a chip address is sent by the I
2
C
master. This address is seven bits long followed by an eighth
bit which is a data direction bit (R/W). The LP3971 address
is 46h. For the eighth bit, a “0” indicates a WRITE and a “1”
indicates a READ. The second byte selects the register to
which the data will be written. The third byte contains data to
write to the selected register.
I
2
C CHIP ADDRESS - 7h’34
MSB
ADR6
Bit7
0
ADR5
Bit6
1
ADR4
Bit5
1
ADR3
Bit4
0
ADR2
Bit3
1
ADR1
Bit2
0
ADR0
Bit1
0
R/W
Bit0
R/W
Write Cycle
20180716
When a READ function is to be accomplished, a WRITE function must precede the READ function as follows.
Read Cycle
20180717
w = write (SDA = “0”)
r = read (SDA = “1”)
ack = acknowledge (SDA pulled down by either master or slave)
rs = repeated start
id = 34h (Chip Address)
L
www.national.com
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| LP3971SQ-A514 | POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| LP3971SQ-B410 | POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| LP3971SQX-A514 | POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| LP3971SQX-B410 | POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| LP3994 | 50mA CMOS Voltage Regulator with Enable Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP3971SQ-2G16/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3971SQ-7848/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3971SQ-8858/NOPB | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
| LP3971SQ-A514 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:POWER MANAGEMENT UNIT FOR ADVANCED APPLICATION PROCESSORS |
| LP3971SQ-B410 | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
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