參數(shù)資料
型號: LP3954RLX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 顯示驅(qū)動器
英文描述: Advanced Lighting Management Unit
中文描述: LED DISPLAY DRIVER, PBGA36
封裝: 3 X 3 MM, 0.65 MM HEIGHT, 0.50 MM PITCH, MICRO, SMD-36
文件頁數(shù): 5/56頁
文件大小: 5801K
代理商: LP3954RLX
Electrical Characteristics
(Notes 2, 11)
Limits in standard typeface are for T
J
= 25° C. Limits in
boldface
type apply over the operating ambient temperature range (-30°
C < T
A
< +85°C). Unless otherwise noted, specifications apply to the LP3954 Block Diagram with: V
DD1
= V
DD2
= 3.6V, V
DDIO
=
2.8V, C
VDD
= C
VDDIO
= 100nF, C
OUT
= C
IN
= 10μF, C
VDDA
= 1μF, C
REF
= 100nF, L
1
= 4.7μH, R
FLASH
=1.2k, R
RGB
=5.6k and R
RT
=82k (Note 12).
Symbol
Parameter
I
VDD
Standby supply current
(V
DD1
, V
DD2
)
No-boost supply current
(V
DD1
, V
DD2
)
Condition
Min
Typ
1
Max
8
Units
μA
NSTBY = L
SCK, SS, SI
NSTBY = H,
EN_BOOST = L
SCK, SS, SI
Audio sync and LEDs OFF
NSTBY = H,
EN_BOOST = H
SCK, SS, SI
Audio sync and LEDs OFF
Autoload OFF
CC mode at R1, G1, B1 and
R2, G2, B2 set to 15mA
SW mode
4+2 banks I
OUT
/LED 25mA
400
μA
No-load supply current
(V
DD1
, V
DD2
)
1
mA
RGB drivers
(V
DD1
, V
DD2
)
150
μA
150
500
WLED drivers
(V
DD1
, V
DD2
)
Audio synchronization
(V
DD1
, V
DD2
)
μA
Audio sync ON
V
DD1,2
= 2.8V
V
DD1,2
= 3.6V
I(R
FLASH
)=1mA
Peak current during flash
NSTBY = L
SCK, SS, SI = H
μA
390
700
Flash
(V
DD1
, V
DD2
)
V
DDIO
Standby Supply
current
V
DDIO
supply current
2
mA
I
VDDIO
1
μA
1MHz SCK frequency in SPI
mode, C
L
= 50pF at SO pin
7V tolerant application only
I
BOOST
= 300mA
(Note 13)
20
μA
I
EXT_LDO
External LDO output current
(V
DD1
, V
DD2
, V
DDA
)
Output voltage of internal
LDO for analog parts
6.5
mA
V
DDA
2.72
-3
2.80
2.88
+3
V
%
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation
of the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions,
see the Electrical Characteristics tables.
Note 2:
All voltages are with respect to the potential at the GND pins.
Note 3:
Battery/Charger voltage should be above 6V no more than 10% of the operational lifetime.
Note 4:
Voltage tolerance of LP3954 above 6.0V relies on fact that V
and V
(2.8V) are available (ON) at all conditions. If V
DD1
and V
DD2
are not available
(ON) at all conditions, National Semiconductor does not guarantee any parameters or reliability for this device.
Note 5:
The total load current of the boost converter in worst-case conditions should be limited to 300mA (min. input and max. output voltage).
Note 6:
Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T
J
=160°C (typ.) and disengages at
T
J
=140°C (typ.).
Note 7:
For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip
Scale Package or Application Note AN1412 : Micro SMDxt Wafer Level Chip Scale Package.
Note 8:
The Human body model is a 100pF capacitor discharged through a 1.5k
resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 9:
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
= 125°C), the maximum power
dissipation of the device in the application (P
), and the junction-to ambient thermal resistance of the part/package in the application (
θ
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
– (θ
JA
× P
D-MAX
).
Note 10:
Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 11:
Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 12:
Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 13:
V
DDA
output is not recommended for external use.
5
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