
7
LNK304-306
D
1/04
Feedback Resistors R1 and R3
The values of the resistors in the resistor divider formed by R1
and R3 are selected to maintain 1.65 V at the FB pin. It is
recommended that R3 be chosen as a standard 1% resistor of
2 k
. This ensures good noise immunity by biasing the
feedback network with a current of approximately 0.8 mA.
Feedback Capacitor C3
Capacitor C3 can be a low cost general purpose capacitor. It
provides a “sample and hold” function, charging to the output
voltage during the off time of LinkSwitch-TN. Its value should
be 10
F to 22 F; smaller values cause poorer regulation at
light load conditions.
Pre-load Resistor R4
In high-side, direct feedback designs where the minimum load
is <3 mA, a pre-load resistor is required to maintain output
regulation. This ensures sufficient inductor energy to pull the
inductor side of the feedback capacitor C3 to input return via
D2. The value of R4 should be selected to give a minimum
output load of 3 mA.
In designs with an optocoupler the Zener or reference bias
current provides a 1 mA to 2 mA minimum load, preventing
“pulse bunching” and increased output ripple at zero load.
LinkSwitch-TN Layout Considerations
In the buck or buck-boost converter configuration, since the
SOURCE pins in LinkSwitch-TN are switching nodes, the
copper area connected to SOURCE should be minimized to
minimize EMI within the thermal constraints of the design.
In the boost configuration, since the SOURCE pins are tied to
DC return, the copper area connected to SOURCE can be
maximized to improve heatsinking.
The loop formed between the LinkSwitch-TN, inductor (L1),
freewheeling diode (D1), and output capacitor (C2) should be
kept as small as possible. The BYPASS pin capacitor C1
(Figure 6) should be located physically close to the
SOURCE (S) and BYPASS (BP) pins. To minimize direct
coupling from switching nodes, the LinkSwitch-TN should be
placed away from AC input lines. It may be advantageous to
place capacitors C4 and C5 in-between LinkSwitch-TN and the
AC input. The second rectifier diode D4 is optional, but may be
included for better EMI performance and higher line surge
withstand capability.
Quick Design Checklist
As with any power supply design, all LinkSwitch-TN designs
should be verified for proper functionality on the bench. The
following minimum tests are recommended:
1) Adequate DC rail voltage - check that the minimum DC
input voltage does not fall below 70 VDC at maximum load,
minimum input voltage.
2) Correct Diode Selection – UF400x series diodes are
recommended only for designs that operate in MDCM at an
ambient of 70
°C or below. For designs operating in
continuous conduction mode (CCM) and/or higher ambients,
then a diode with a reverse recovery time of 35 ns or better,
such as the BYV26C, is recommended.
3) Maximum drain current - verify that the peak drain current
is below the data sheet peak drain specification under worst-
case conditions of highest line voltage, maximum overload
(just prior to auto-restart) and highest ambient temperature.
4) Thermal check – at maximum output power, minimum input
voltage and maximum ambient temperature, verify that the
LinkSwitch-TN SOURCE pin temperature is 100
°C or
below. This figure ensures adequate margin due to variations
in R
DS(ON) from part to part. A battery powered thermocouple
TOPOLOGY
BASIC CIRCUIT SCHEMATIC
KEY FEATURES
Low-Side
1) Output referenced to input
Buck Boost –
2) Positive output (V
O) with respect to +VIN
Optocoupler
3) Step up/down – V
O > VIN or VO < VIN
Feedback
4) Optocoupler feedback
- Accuracy only limited by reference choice
- Low cost non-safety rated opto
- No pre-load required
5) Fail-safe – output is not subjected to input
voltage if the internal MOSFET fails
6) Minimum no-load consumption
LinkSwitch-TN
PI-3756-111903
+
BP
FB
D
S
V
O
V
IN
+
Table 2 (cont). Common Circuit Configurations Using LinkSwitch-TN.