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參數(shù)資料
| 型號： | LMZ1601-7R |
| 廠商： | POWER-ONE INC |
| 元件分類： | 電源模塊 |
| 英文描述： | 1-OUTPUT 50 W AC-DC REG PWR SUPPLY MODULE |
| 文件頁數(shù)： | 14/26頁 |
| 文件大?。?/td> | 771K |
| 代理商： | LMZ1601-7R |
M Series Data Sheet
50 Watt DC-DC and AC-DC Converters
BCD20018 Rev AB
Page 21 of 26
www.power-one.com
JFET output (D0 – D4):
Connector pin D is internally connected via the drain-source
path of a JFET (self-conducting type) to the negative potential
of output 1. VD - 0.4 V (logic low) corresponds to a monitored
voltage level (Vi and/or Vo1) < Vt. The current I D through the
JFET should not exceed 2.5 mA. The JFET is protected by a
0.5 W Zener diode of 8.2 V against external overvoltages.
NPN output (D5 – D9):
Connector pin D is internally connected via the collector-
emitter path of a NPN transistor to the negative potential of
output 1. VD – 0.4 V (logic low) corresponds to a monitored
voltage level (Vi and/or Vo1) > Vt + Vh. The current ID through
the open collector should not exceed 20 mA. The NPN output
is not protected against external overvoltages. VD should not
exceed 40 V.
Vi, Vo1 status
D output, VD
Vi or Vo1 < Vt
low, L, VD – 0.4 V at I D = 2.5 mA
Vi and Vo1 > Vt + Vh
high, H, ID – 25 A at VD = 5.25 V
Vi, Vo1 status
D output, VD
Vi or Vo1 < Vt
high, H, ID – 25 A at VD = 40 V
Vi and Vo1 > Vt + Vh
low, L, VD – 0.4 V at ID = 20 mA
Fig. 20
Options D0 – D4, JFET output
Fig. 21
Options D5 – D9, NPN output
Vo1+
Vo1–
D
VD
ID
Rp
Input
11006
Vo1+
Vo1–
D
VD
ID
Rp
Input
11007a
Threshold tolerances and hysteresis:
If Vi is monitored, the internal input voltage after the input filter
and rectifier (EM and LM types) is measured. Consequently,
this voltage differs from the voltage at the connector pins by the
voltage drop
Vti across input filter and rectifier. The threshold
level of the D0 and D9 options is adjusted in the factory at
nominal output current Io nom and TA = 25 °C. The value of
Vti
depends upon input voltage range (AM, BM, etc.), threshold
level Vt, temperature, and input current.
Fig. 22
Definition of Vti,
Vti, and Vhi (JFET output)
V
ti
Vhi
VD low
VD
VD high
Vi
P
o
=
P
o
nom
P
o
=
0
P
o
=
0
Vti
P
o
=
P
o
nom
11021a
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