參數(shù)資料
型號(hào)： LMX3161VBH
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 無(wú)繩電話/電話
英文描述： Single Chip Radio Transceiver
中文描述： TELECOM, CORDLESS, SUPPORT CIRCUIT, PQFP48
封裝： 7 X 7 MM, 1.40 MM HEIGHT, PLASTIC, QFP-48
文件頁(yè)數(shù)： 3/14頁(yè)
文件大?。?/td> 212K
代理商： LMX3161VBH
LMX3161 Pin Diagram
(Continued)
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
V
CC
MIXER
OUT
V
CC
GND
RF
IN
GND
Tx V
REG
V
CC
GND
Tx
OUT
GND
V
CC
GND
GND
f
IN
CE
I/O
—
O
—
—
I
—
—
—
—
O
—
—
—
—
I
I
Description
Power supply for CMOS section of PLL and ESD bussing.
IF output from the mixer.
Power supply for mixer section.
Ground.
RF input to the mixer.
Ground.
Regulated power supply for external PA gain stage.
Power supply for analog sections of PLL and doubler.
Ground.
Frequency doubler output.
Ground.
Power supply for analog sections of PLL and doubler.
Ground.
Ground.
RF Input to PLL and frequency doubler.
Chip Enable. Pulling LOW powers down entire chip. Taking CE HIGH powers up the
appropriate functional blocks depending on the state of bits F6, F7, F11, and F12
programmed in F-latch. It is necessary to initialize the internal registers once, after the
power up reset. The registers’ contents are kept even in power-down condition.
Power supply for charge pump.
Charge pump output. For connection to a loop filter for driving the input of an external VCO.
Power supply for CMOS section of PLL and ESD bussing.
Ground.
Programmable CMOS output. Refer to Function Register Programming Description section
for details.
Receiver power down control input or programmable CMOS output. Refer to Function
Register Programming Description section for details.
Transmitter power down control input or programmable CMOS output. Refer to Function
Register Programming Description section for details.
PLL power down control input. LOW for PLL normal operations, and HIGH for PLL power
saving.
MICROWIRE
clock input. High impedance CMOS input with Schmitt Trigger.
MICROWIRE data input. High impedance CMOS input with Schmitt Trigger.
MICROWIRE load enable input. High impedance CMOS input with Schmitt Trigger.
Oscillator input. High impedance CMOS input with feedback.
DC compensation circuit enable. While LOW, the DC compensation circuit is enabled and
the threshold is updated through the DC compensation loop. While HIGH, the switch is
opened, and the comparator threshold is held by the external capacitor.
Received signal strength indicator (RSSI) output.
Threshold level to external comparator.
Input to DC compensation circuit.
Demodulated output of discriminator.
Ground.
Power supply for the discriminator circuit.
Quadrature input for tank circuit.
Power supply for limiter output stage.
Ground.
Power supply for limiter gain stages.
Ground.
Power supply for IF amplifier gain stages.
17
18
19
20
21
V
P
D
o
V
CC
GND
OUT 0
—
O
—
—
O
22
Rx PD/OUT 1
I/O
23
Tx PD/OUT 2
I/O
24
PLL PD
I
25
26
27
28
29
CLOCK
DATA
LE
OSC
IN
S FIELD
I
I
I
I
I
30
31
32
33
34
35
36
37
38
39
40
41
RSSI
OUT
THRESH
DC COMP
IN
DISC
OUT
GND
V
CC
QUAD
IN
V
CC
GND
V
CC
GND
V
CC
O
O
I
O
—
—
I
—
—
—
—
—
L
www.national.com
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