參數(shù)資料
型號(hào)： LMX2515LQX1321
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： XO, clock
英文描述： PLLatinum⑩ Frequency Synthesizer System with Integrated VCO
中文描述： PLL FREQUENCY SYNTHESIZER, 26 MHz, QCC28
封裝： 5 X 5 MM, 0.75 MM HEIGHT, LLP-28
文件頁(yè)數(shù)： 6/17頁(yè)
文件大?。?/td> 251K
代理商： LMX2515LQX1321
Electrical Characteristics
(V
IN
= 2.8 V, refer to Typical Application Circuit; Limits in standard typeface are for
T
A
= 25 C; Limits in
boldface
type apply over the operating temperature range from -20 C
≤
T
A
≤
75 C unless otherwise
noted.) (Continued)
Symbol
RF VCO
L(f)
RFout
Parameter
Condition
Min
Typ
Max
Units
Phase Noise in Normal Mode.
@
25 kHz offset
-95
-93
-91
-103
-101
-113
-111
-135
-133
-25
-20
-45
-60
-69
-75
dBc/Hz
@
50 kHz offset
-106
dBc/Hz
@
100 kHz offset
-115
dBc/Hz
@
1 MHz offset
dBc/Hz
2nd Harmonic Suppression
3rd Harmonic Suppression
Spurious Tones
dBc
dBc
dBc
dBc
dBc
dBc
@
≤
25 kHz offset
@
25 kHz
<
offset
≤
50 kHz
@
50 kHz
<
offset
≤
100 kHz
@
offset
>
100 kHz
DIGITAL INTERFACE (DATA, CLK, LE, LD, CE)
V
IH
High-Level Input Voltage
0.8 V
CC
0.8 V
DD
-0.3
-0.3
-10
-10
V
CC
V
DD
0.2 V
CC
0.2 V
DD
10
10
V
V
V
V
μA
μA
pF
ns
V
V
V
pF
V
IL
Low-Level Input Voltage
I
IH
I
IL
High-Level Input Current
Low-Level Input Current
Input Capacitance
Rise/Fall Time
High-Level Output Voltage
3
30
V
OH
V
CC
- 0.4
V
DD
- 0.4
V
OL
Low-Level Output Voltage
Output Capacitance
MICROWIRE INTERFACE TIMING
t
CS
Data to Clock Set Up Time
t
CH
Data to Clock Hold Time
t
CWH
Clock Pulse Width HIGH
t
CWL
Clock Pulse Width LOW
t
ES
Clock to Latch Enable Set Up Time
t
EW
Latch Enable Pulse Width
0.4
5
50
10
50
50
50
50
ns
ns
ns
ns
ns
ns
Note 6:
The reference frequency must also be programmed using the OSC_FREQ control bit. For other reference frequencies, please contact National
Semiconductor.
Note 7:
For other frequency ranges, please contact National Semiconductor.
Note 8:
Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-1 kHz
of the final frequency.
Note 9:
Lock time is defined as the time difference between the beginning of the frequency transition and the point at which the frequency remains within +/-3 kHz
of the final frequency.
Note 10:
All limits are guaranteed. All electrical characteristics having room temperature limits are tested during production with T
A
= 25 C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
L
www.national.com
6
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參數(shù)描述
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LMX2522LQ1635 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2522LQ1635/NOPB 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
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