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參數(shù)資料
| 型號： | LMX2487SQ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 6000 MHz, PQCC24 |
| 封裝： | 4 X 4 MM, 0.80 MM HEIGHT, PLASTIC, LLP-24 |
| 文件頁數(shù)： | 21/37頁 |
| 文件大?。?/td> | 856K |
| 代理商： | LMX2487SQ |
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Functional Description
(Note 8)
(Continued)
CE Pin
Low
RF_PD
X
ATPU
Bit Enabled +
Write to RF
N Counter
X
PLL State
Powered Down
(Asynchronous)
Powered Up
Powered Up
Powered Down
( Asynchronous )
High
High
High
X
0
1
Yes
No
No
1.7 DIGITAL LOCK DETECT OPERATION
The RF PLL digital lock detect circuitry compares the differ-
ence between the phase of the inputs of the phase detector
to a RC generated delay of
e
. To indicate a locked state
(Lock = HIGH) the phase error must be less than the
e
RC
delay for 5 consecutive reference cycles. Once in lock (Lock
= HIGH), the RC delay is changed to approximately
δ
. To
indicate an out of lock state (Lock = LOW), the phase error
must become greater
δ
. The values of
e
and
δ
are dependent
on which PLL is used and are shown in the table below:
PLL
RF
IF
e
δ
10 ns
15 ns
20 ns
30 ns
When the PLL is in the power down mode and the Ftest/LD
pin is programmed for the lock detect function, it is forced
LOW. The accuracy of this circuit degrades at higher com-
parison frequencies. To compensate for this, the DIV4 word
should be set to one if the comparison frequency exceeds 20
MHz. The function of this word is to divide the comparison
frequency presented to the lock detect circuit by 4. Note that
if the MUX[3:0] word is set such as to view lock detect for
both PLLs, an unlocked (LOW) condition is shown whenever
either one of the PLLs is determined to be out of lock.
20154704
L
www.national.com
21
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| LMX2487SQX | 3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2487SQ/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2487SQX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum? Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2487SQX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2491RTWR | 功能描述:HIGH FREQUENCY PLL 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 類型:頻率合成器（RF） PLL:是 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:無/無 頻率 - 最大值:6.4GHz 分頻器/倍頻器:是/是 電壓 - 電源:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-WFQFN 裸露焊盤 供應(yīng)商器件封裝:24-WQFN（4x4） 標(biāo)準(zhǔn)包裝:1 |
| LMX2491RTWT | 功能描述:6.4GHZ LOW NOISE FRACTIONAL N PL 制造商:texas instruments 系列:- 包裝:剪切帶（CT） 零件狀態(tài):在售 類型:頻率合成器（RF） PLL:是 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:無/無 頻率 - 最大值:6.4GHz 分頻器/倍頻器:是/是 電壓 - 電源:3.15 V ~ 3.45 V 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-WFQFN 裸露焊盤 供應(yīng)商器件封裝:24-WQFN（4x4） 標(biāo)準(zhǔn)包裝:1 |
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