參數(shù)資料
型號: LMX2430SLEX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum Dual High Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 3000 MHz, PQCC20
封裝: PLASTIC, UTCSP-20
文件頁數(shù): 45/49頁
文件大?。?/td> 943K
代理商: LMX2430SLEX
2.0 Programming Description
(Continued)
2.8.2 IF_B[13:0] - IF Synthesizer Programmable Binary Counter (B Counter) (R4[20:7])
The IF_B control word is used to setup the IF synthesizer’s B counter. The B counter is a 14-bit programmable binary counter
used in the programmable feedback divider. The IF_B control word can be programmed to values ranging from 3 to 16383. Divide
ratios less than 3 are prohibited.
Divide
Ratio
3
4
16383
IF_B[13:0]
7
0
0
1
13
0
0
1
12
0
0
1
11
0
0
1
10
0
0
1
9
0
0
1
8
0
0
1
6
0
0
1
5
0
0
1
4
0
0
1
3
0
0
1
2
0
1
1
1
1
0
1
0
1
0
1
2.8.3 IF_P - IF Synthesizer Prescaler Select (R4[22])
The LMX243x IF synthesizer utilizes a selectable dual modulus prescaler. An 8/9 or a 16/17 prescale ratio can be selected.
Control Bit
Register Location
Description
Function
0
1
IF_P
R4[22]
IF Prescaler Select
8/9 Prescaler
Selected
16/17 Prescaler
Selected
2.8.4 IF_PD - IF Synthesizer Powerdown (R4[23])
The IF_PD bit is used to switch the IF PLL between a powered up and powered down mode.
Furthermore, the IF_PD bit operates in conjuction with the IF_CPT bit to set a synchronous or an asynchronous powerdown
mode. Refer to
Section 2.7.4
for more details on how to program the IF_CPT bit.
Control Bit
Register Location
Description
Function
0
1
IF_PD
R4[23]
IF Powerdown
IF PLL Active
IF PLL Powerdown
L
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