參數(shù)資料
型號(hào): LMX2364TMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: 2.6 GHz PLLatinum Fractional RF Frequency Synthesizer with 850 MHz Integer IF Frequency Synthesizer
中文描述: PLL FREQUENCY SYNTHESIZER, 2600 MHz, PDSO24
封裝: TSSOP-24
文件頁(yè)數(shù): 6/39頁(yè)
文件大小: 694K
代理商: LMX2364TMX
Electrical Characteristics
(V
Vcc
= V
Vcp
= 3.0V; 40C
T
A
+85C except as specified) (Continued)
Symbol
Parameter
Conditions
Value
Typ
Units
Min
Max
OSCILLATOR PARAMETERS
f
OSC
Oscillator Operating
Frequency
Oscillator Sensitivity
Oscillator Input Current
2
110
MHz
v
OSC
I
OSC
OSCinRF, OSCinIF
V
OSC
= V
Vcc
V
OSC
= 0V
0.5
V
Vcc
100
V
μA
μA
100
DIGITAL INTERFACE (DATA, CLK, LE, ENIF, ENRF, Ftest/LD, FLoutRF, FLoutIF)
V
IH
High-Level Input Voltage
2.7
V
Vcc
3.2
3.2
<
V
Vcc
5.5
1.6
2
V
V
V
μA
μA
V
V
V
IL
I
IH
I
IL
V
OH
V
OL
MICROWIRE INTERFACE TIMING
T
CS
T
CH
T
CWH
T
CWL
T
ES
Low-Level Input Voltage
High-Level Input Current
Low-Level Input Current
High-Level Output Voltage
Low-Level Output Voltage
0.4
1.0
1.0
V
IH
= V
CC
V
IL
= 0
I
OH
= 500 μA
I
OL
= 500 μA
1.0
1.0
V
CC
0.4
0.4
Data to Clock Set Up Time
Data to Clock Hold Time
Clock Pulse Width High
Clock Pulse Width Low
Clock to Load Enable Set
Up Time
Load Enable Pulse Width
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
See Data Input Timing
50
10
50
50
ns
ns
ns
ns
50
ns
T
EW
PHASE NOISE
L
F1Hz
(f) RF
See Data Input Timing
50
ns
RF Synthesizer’s
Normalized Phase Noise
Contribution, Fractional
Mode (Note 4)
RF_OM = 1 (Fractional Mode)
f = 3 KHz
TCXO Reference Source
RF_CP = 1 (4 mA)
V
ENIF
= LOW
RF_OM = 0 (Integer Mode)
f = 3 KHz
TCXO Reference Source
RF_CP = 2 (4 mA)
V
ENIF
= LOW
f = 3 KHz
TCXO Reference Source
IF_CP = 1 (800 mA)
V
ENRF
= LOW
208
dBc/Hz
RF Synthesizer’s
Normalized Phase Noise
Contribution, Integer Mode
(Note 4)
215
dBc/Hz
L
F1Hz
(f) IF
IF Synthesizer’s
Normalized Phase Noise
Contribution (Note 4)
212
dBc/Hz
Note 3:
Some reference divider ratios between the minimum and maximum are not realizable. See the section on R divider programming for more details.
Note 4:
Normalized Phase Noise Contribution is defined as: L
F1Hz
(f) = L(f) – 20·log(N) – 10log(f
COMP
) where L(f) is defined as the single side band phase noise
measured at an offset frequency, f, in a 1 Hz Bandwidth. The offset frequency, f, must be chosen sufficiently smaller than the PLL’s loop bandwidth, yet large enough
to avoid substantial phase noise contribution from the reference source.
L
www.national.com
6
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