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參數(shù)資料
| 型號： | LMX2335TM |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | PLLatinum⑩ Dual Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 1100 MHz, PDSO16 |
| 封裝： | PLASTIC, TSSOP-16 |
| 文件頁數(shù)： | 11/18頁 |
| 文件大?。?/td> | 393K |
| 代理商： | LMX2335TM |
Functional Description
(Continued)
Note 9:
When the F
o
LD output is disabled it is actively pulled to a low logic state.
Note 10:
Lock detect output provided to indicate when the VCO frequency is in “l(fā)ock”. When the loop is locked and a lock detect mode is selected, the pins output
is HIGH, with narrow pulses LOW. In the RF1/RF2 lock detect mode a locked condition is indicated when RF2 and RF1 are both locked.
Note 11:
The Fastlock mode utilized the F
LD output pin to switch a second loop filter damping resistor to ground during fastlock operation. Activation of Fastlock
occurs whenever the RF loop’s Icpo magnitude bit
#
17 is selected HIGH (while the
#
19 and
#
20 mode bits are set for Fastlock).
Note 12:
The Counter Reset mode bits R19 and R20 when activated reset all counters. Upon removal of the Reset bits the N counter resumes counting in “close”
alignment with the R counter. (The maximum error is one prescaler cycle). If the Reset bits are activated the R counter is also forced to Reset, allowing smooth ac-
quisition upon powering up.
SERIAL DATA INPUT TIMING
PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS
DS012332-8
Notes:
Parenthesis data indicates programmable reference divider data.
Data shifted into register on clock rising edge.
Data is shifted in MSB first.
Th V
CC
/2. The test waveform has an edge rate of 0.6V/ns with
Test Conditions:
CC
= 2.7V and 2.6V
@
V
CC
= 5.5V.
DS012332-9
Notes:
Phase difference detection range: 2
π
to +2
π
The minimum width pump up and pump down current pulses occur at the D
o
pin when the loop is locked.
www.national.com
11
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2335TMX | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| LMX2335U | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335U WAF | 制造商:Texas Instruments 功能描述: |
| LMX2335USLBX | 功能描述:IC FREQ SYNTH DUAL 16LAMINATECSP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應商設備封裝:* 包裝:* |
| LMX2335UTM | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
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