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參數(shù)資料
| 型號： | LMX2331 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| 中文描述： | PLLatinum⑩低功耗雙頻率合成射頻個人通信 |
| 文件頁數(shù)： | 19/21頁 |
| 文件大小： | 496K |
| 代理商： | LMX2331 |
Application Information
(Continued)
between 1X and 4X values. This is accomplished by increas-
ing the charge pump output current from 1 mA in the stan-
dard mode to 4 mA in Fastlock.
FASTLOCK CIRCUIT IMPLEMENTATION
A diagram of the Fastlock scheme as implemented in Na-
tional Semiconductors LMX233XL PLL is shown in Figure 5
When a new frequency is loaded, and the RF Icp
bit is set
high the charge pump circuit receives an input to deliver 4
times the normal current per unit phase error while an open
drain NMOS on chip device switches in a second R2 resistor
element to ground. The user calculates the loop filter compo-
nent values for the normal steady state considerations. The
device configuration ensures that as long as a second iden-
tical damping resistor is wired in appropriately, the loop will
lock faster without any additional stability considerations to
account for. Once locked on the correct frequency, the user
can return the PLL to standard low noise operation by send-
ing a MICROWIRE instruction with the RF Icp
bit set low.
This transition does not affect the charge on the loop filter
capacitors and is enacted synchronous with the charge
pump output. This creates a nearly seamless change be-
tween Fastlock and standard mode.
DS012806-17
FIGURE 4. Open Loop Response Bode Plot
DS012806-18
FIGURE 5. Fastlock PLL Architecture
www.national.com
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| LMX2331LTM | PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2331LSLB | PLLatinum⑩ Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335UTMX | PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335USLBX | PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
| LMX2335UTM | PLLatinum Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2331 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2331A | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Dual Frequency Synthesizer for RF Personal Communications |
| LMX2331ATM | 制造商:Texas Instruments 功能描述: |
| LMX2331ATMX | 功能描述:IC FREQ SYNTH DUAL 20-TSSOP RoHS:否 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標準包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時鐘 輸出:時鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:* |
| LMX2331L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述: |
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