參數(shù)資料
型號(hào)： LMX2312U
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： XO, clock
英文描述： PLLatinum⑩ Ultra Low Power Frequency Synthesizer for RF Personal Communications
中文描述： PLL FREQUENCY SYNTHESIZER, 1200 MHz, QCC20
封裝： THIN, CSP-20
文件頁(yè)數(shù)： 24/29頁(yè)
文件大?。?/td> 662K
代理商： LMX2312U
1.0 Functional Description
(Continued)
20043805
1.9 Fastlock
OUTPUT
The FL pin can be used as the Fastlock output. The FL pin
can also be programmed as constant low, constant high
(referenced to V
CC
), or constant high impedance, selectable
through the T register. When the device is configured in
Fastlock mode, the charge pump current can be increased
4x while maintaining loop stability by synchronously switch-
ing a parallel loop filter resistor to ground with the FL pin,
resulting in a
～
2x increase in loop bandwidth. The loop
bandwidth, the zero gain crossover point of the open loop
gain, is effectively shifted up in frequency by a factor of the
square root of 4 = 2 during Fastlock mode. For
ω
' = 2
ω
, the
phase margin during Fastlock also will remain constant. The
user calculates the loop filter component values for the
normal steady state considerations. The device configura-
tion ensures that as long as a second resistor, equal to the
primary resistor value, is wired in appropriately, the loop will
lock faster without any additional stability considerations.
The PLL can be configured to be in either the Fastlock mode
continuously or in the Fastlock mode that uses a timeout
counter to switch it back to the normal mode. In the Fastlock
mode the charge pump current is set to 4 mA and the FL pin
is set low. If the user sets the PLL to be in the Fastlock mode
continuously he can send the R register with CPo_4X set low
(R[18] = 0) and sets TO_CNTR[11:0] to 1. The user can set
the PLL to normal mode (1 mA mode and set the FL pin to
TRI-STATE mode) by programming TO_CNTR[11:0] to 0. If
the user elects to use the timeout counter, he can program
the timeout counter from 4 to 4095. The timeout counter will
count down the programmed number of phase detector ref-
erence cycles. After the programmed number of phase de-
tector reference cycles is reached, it will automatically set
the charge pump current to the 1 mA mode and set the FL
pin to TRI-STATE mode. A complete programming descrip-
tion is in Section 3.4.2.
L
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24
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參數(shù)描述
LMX2312USLDX 制造商:MAJOR 功能描述:
LMX2312USLDX/NOPB 功能描述:IC FREQ SYNTH 1.2GHZ 20LAMTCSP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
LMX2313U 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Ultra Low Power Frequency Synthesizer for RF Personal Communications
LMX2313USLDX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinum⑩ Ultra Low Power Frequency Synthesizer for RF Personal Communications
LMX2313USLDX/NOPB 功能描述:IC FREQ SYNTH 600MHZ 20LAMTCSP RoHS:否 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:PLLatinum™ 標(biāo)準(zhǔn)包裝:39 系列:- 類型:* PLL:帶旁路 輸入:時(shí)鐘 輸出:時(shí)鐘 電路數(shù):1 比率 - 輸入:輸出:1:10 差分 - 輸入:輸出:是/是 頻率 - 最大:170MHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:* 封裝/外殼:* 供應(yīng)商設(shè)備封裝:* 包裝:*
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