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參數(shù)資料
| 型號： | LMS1485IMX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 通用總線功能 |
| 英文描述： | 5V Low Power RS-485 Differential Bus Transceiver |
| 中文描述： | LINE TRANSCEIVER, PDSO8 |
| 封裝： | SOIC-8 |
| 文件頁數(shù)： | 4/10頁 |
| 文件大?。?/td> | 224K |
| 代理商： | LMS1485IMX |
Electrical Characteristics
(Continued)
Over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
Symbol
V
OH
Parameter
Conditions
Min
4
Typ
Max
Units
V
CMOS High-Level Output
Voltage
Short-Circuit Output Current
Tristate Output Leakage
Current
Power Supply Current
I
CC
Supply Current
I
OH
= 4mA
I
OSR
I
OZ
V
O
= GND or V
CC
0.4V
≤
V
O
≤
+2.4V
7
85
1
mA
μA
1
Driver Enabled, Output = No Load,
Digital Inputs = GND or V
CC
Driver Disabled, Output = No Load,
Digital Inputs = GND or V
CC
1.1
2.2
mA
1
2.2
mA
Switching Characteristics
Driver
T
PLH
,
T
PHL
Output
T
SKEW
Driver Output Skew
Propagation Delay Input to
R
L
= 54
, C
L
= 100pF
(
Figure 3
,
Figure 7
)
R
L
= 54
, C
L
= 100pF
(
Figure 3
,
Figure 7
)
R
L
= 100
, C
L
= 100pF
(
Figure 3
,
Figure 7
)
(
Figure 4
,
Figure 8
)
11
20
ns
1
ns
T
R
,
T
F
T
ENABLE
Driver Rise and Fall Time
5
10
ns
Driver Enable to Ouput Valid
Time
Output Disable Time
18
32
ns
T
DISABLE
Receiver
T
PLH
,
T
PHL
T
SKEW
T
ENABLE
T
DISABLE
(
Figure 4
,
Figure 8
)
20
40
ns
Propagation Delay Input to
Output
Receiver Output Skew
Receiver Enable Time
Receiver Disable Time
C
L
= 15pF
(
Figure 5
,
Figure 7
)
(
Figure 5
,
Figure 7
)
(
Figure 6
,
Figure 10
)
(
Figure 6
,
Figure 10
)
18
33
55
ns
2
6
15
ns
ns
ns
25
25
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is
intended to be functional, but specific performance is not guaranteed. For guaranteed specifications and the test conditions, see the Electrical Characteristics
Note 2:
All voltage values, except differential I/O bus voltage, are with respect to network ground terminal.
Note 3:
The maximum power dissipation is a function of T
J(MAX)
,
θ
JA
, and T
A
. The maximum allowable power dissipation at any ambient temperature is P
D
=
(T
J(MAX)
- T
A
)/
θ
JA
. All numbers apply for packages soldered directly into a PC board.
Note 4:
ESD rating based upon human body model, 100pF discharged through 1.5k
.
Note 5:
Voltage limits apply to DI, DE, RE pins.
Note 6:
Differential input/output bus voltage is measured at the non-inverting terminal A with respect to the inverting terminal B.
Note 7:
|
V
OD
| and |
V
OC
| are changes in magnitude of V
OD
and V
OC
, respectively when the input changes from high to low levels.
Note 8:
ESD rating applies to pins 6 and 7
Note 9:
ESD rating applies to pins 1, 2, 3, 4, 5 and 8
L
www.national.com
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