參數(shù)資料
型號(hào): LMH6655MA
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻/視頻放大
英文描述: Single/Dual Low Power, 250 MHz, Low Noise Amplifiers
中文描述: VIDEO AMPLIFIER, PDSO8
封裝: SOIC-8
文件頁(yè)數(shù): 13/17頁(yè)
文件大?。?/td> 652K
代理商: LMH6655MA
Application Information
(Continued)
The free evaluation board are shipped automatically when a
device sample request is placed with National Semiconduc-
tor.
The CLC730027 datasheet also contains tables of recom-
mended components to evaluate several of National’s high
speed amplifiers. This table for the LMH6654 is illustrated
below. Refer to the evaluation board datasheet for schemat-
ics and further information.
Components Needed to Evaluate the LMH6654 on the
Evaluation Board:
R
f
R
g
use the datasheet to select values.
R
, R
typically 50
(Refer to the Basic Operation
section of the evaluation board datasheet for details)
R
is an optional resistor for inverting again configurations
(select R
f
to yield desired input impedance = R
g
||R
f
)
C
1
, C
2
use 0.1μF ceramic capacitors
C
3
, C
4
use 10μF tantalum capacitors
Components not used:
1.
C
5
, C
6
, C
7
, C
8
2.
R1 thru R8
The evaluation boards are designed to accommodate dual
supplies. The board can be modified to provide single op-
eration. For best performance;
1) do not connect the unused supply.
2) ground the unused supply pin.
power Dissipation
The package power dissipation should be taken into account
when operating at high ambient temperature and/or high
power dissipative conditions. In determining maximum oper-
able temperature of the device, make sure the total power
dissipation of the device is considered; this power dissipated
in the device with a load connected to the output as well as
the nominal dissipation of the op amp.
Driving Capacitive Loads
Capacitive loads decrease the phase margin of all op amps.
The output impedance of a feedback amplifier becomes
inductive at high frequencies, creating a resonant circuit
when the load is capacitive. This can lead to overshoot,
ringing and oscillation. To eliminate oscillation or reduce
ringing, an isolation resistor can be placed as shown in
Figure 2 below. At frequencies above
the load impedance of the Amplifier approaches R
. The
desired performance depends on the value of the isolation
resistor. The isolation resistance vs. capacitance load graph
in the typical performance characteristics provides the
means for selection of the value of R
that provides
3dB
peaking in closed loop A
= 1 response. In general, the
bigger the isolation resistor, the more damped the pulse
response becomes. For initial evaluation, a 50
isolation
resistor is recommended.
Components Selection and Feedback Resistor
It is important in high-speed applications to keep all compo-
nent leads short since wires are inductive at high frequency.
For discrete components, choose carbon composition axially
leaded resistors and micro type capacitors. Surface mount
components are preferred over discrete components for
minimum inductive effect. Never use wire wound type resis-
tors in high frequency applications.
Large values of feedback resistors can couple with parasitic
capacitance and cause undesired effects such as ringing or
oscillation in high-speed amplifiers. Keep resistors as low as
possible consistent with output loading consideration. For a
gain of 2 and higher, 402
feedback resistor used for the
typical performance plots gives optimal performance. For
unity gain follower, a 25
feedback resistor is recommended
rather than a direct short. This effectively reduces the Q of
what would otherwise be a parasitic inductance (the feed-
back wire) into the parasitic capacitance at the inverting
input.
Bias Current Cancellation
In order to cancel the bias current errors of the non-inverting
configuration, the parallel combination of the gain setting R
g
and feedback R
resistors should equal the equivalent
source resistance R
as defined in Figure 3 Combining
this constraint with the non-inverting gain equation, allows
both R
and R
g
to be determined explicitly from the following
equations:
R
f
= A
V
R
seq
and R
g
= R
f
/(A
V
1)
For inverting configuration, bias current cancellation is ac-
complished by placing a resistor R
on the non-inverting
input equal in value to the resistance seen by the inverting
input (R
//(R
+R
). The additional noise contribution of R
b
can be minimized through the use of a shunt capacitor.
20016540
FIGURE 2.
L
www.national.com
13
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