Application Information (Continued) loading reduces the phase margin of op-amps. The combi- nation of t" />
鍙冩暩(sh霉)璩囨枡
鍨嬭櫉锛� LMC6484IM/NOPB
寤犲晢锛� National Semiconductor
鏂囦欢闋佹暩(sh霉)锛� 5/24闋�
鏂囦欢澶�?銆�?/td> 0K
鎻忚堪锛� IC OP AMP QUAD CMOS R-R 14-SOIC
妯欐簴鍖呰锛� 55
鏀惧ぇ鍣ㄩ鍨嬶細 閫氱敤
闆昏矾鏁�(sh霉)锛� 4
杓稿嚭椤炲瀷锛� 婊挎摵骞�
杞�(zhu菐n)鎻涢€熺巼锛� 1.3 V/µs
澧炵泭甯跺绌嶏細 1.5MHz
闆绘祦 - 杓稿叆鍋忓锛� 0.02pA
闆诲 - 杓稿叆鍋忕Щ锛� 110µV
闆绘祦 - 闆绘簮锛� 2.6mA
闆绘祦 - 杓稿嚭 / 閫氶亾锛� 30mA
闆诲 - 闆绘簮锛屽柈璺�/闆欒矾(±)锛� 3 V ~ 15.5 V锛�±1.5 V ~ 7.75 V
宸ヤ綔婧害锛� -40°C ~ 85°C
瀹夎椤炲瀷锛� 琛ㄩ潰璨艰
灏佽/澶栨锛� 14-SOIC锛�0.154"锛�3.90mm 瀵級
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁濓細 14-SOICN
鍖呰锛� 绠′欢
鐢�(ch菐n)鍝佺洰閷勯爜闈細 1266 (CN2011-ZH PDF)
鍏跺畠鍚嶇ū锛� *LMC6484IM
*LMC6484IM/NOPB
LMC6484IM
Application Information (Continued)
loading reduces the phase margin of op-amps. The combi-
nation of the op-amp鈥檚 output impedance and the capacitive
load induces phase lag. This results in either an under-
damped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in
Figure 4. This simple tech-
nique is useful for isolating the capacitive input of multiplex-
ers and A/D converters.
Improved frequency response is achieved by indirectly driv-
ing capacitive loads as shown in
Figure 6.
R1 and C1 serve to counteract the loss of phase margin by
feeding forward the high frequency component of the output
signal back to the amplifier鈥檚 inverting input, thereby preserv-
ing phase margin in the overall feedback loop. The values of
R1 and C1 are experimentally determined for the desired
pulse response. The resulting pulse response can be seen in
Figure 7.
5.0 Compensating for Input Capacitance
It is quite common to use large values of feedback resis-
tance with amplifiers that have ultra-low input current, like
the LMC6484. Large feedback resistors can react with small
values of input capacitance due to transducers, photo-
diodes, and circuit board parasitics to reduce phase
margins.
The effect of input capacitance can be compensated for by
adding a feedback capacitor. The feedback capacitor (as in
Figure 8 ), C
f, is first estimated by:
or
R
1 CIN 鈮� R2 Cf
which typically provides significant overcompensation.
Printed circuit board stray capacitance may be larger or
smaller than that of a breadboard, so the actual optimum
value for C
f may be different. The values of Cf should be
checked on the actual circuit. (Refer to the LMC660 quad
CMOS amplifier data sheet for a more detailed discussion.)
6.0 Printed-Circuit-Board Layout for High-Impedance
Work
It is generally recognized that any circuit which must operate
with less than 1000 pA of leakage current requires special
layout of the PC board. when one wishes to take advantage
DS011714-17
FIGURE 4. Resistive Isolation
of a 330 pF Capacitive Load
DS011714-18
FIGURE 5. Pulse Response of
the LMC6484 Circuit in
Figure 4
DS011714-15
FIGURE 6. LMC6484 Non-Inverting Amplifier,
Compensated to Handle a 330 pF Capacitive Load
DS011714-16
FIGURE 7. Pulse Response of
LMC6484 Circuit in
Figure 6
DS011714-19
FIGURE 8. Canceling the Effect of Input Capacitance
LMC6484
www.national.com
12
鐩搁棞(gu膩n)PDF璩囨枡
PDF鎻忚堪
TMM-144-01-T-S CONN HEADER 44POS SNGL 2MM T/H
TMM-124-01-T-D CONN HEADER 48POS DUAL 2MM T/H
TMM-118-01-G-S CONN HEADER 18POS SNGL 2MM T/H
TMM-118-01-T-D-SM CONN HEADER 36POS DUAL 2MM SMD
RC0805FR-07154KL RES 154K OHM 1/8W 1% 0805 SMD
鐩搁棞(gu膩n)浠g悊鍟�/鎶€琛�(sh霉)鍙冩暩(sh霉)
鍙冩暩(sh霉)鎻忚堪
LMC6484IMX 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
LMC6484IMX/NOPB 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 CMOS QUAD RRIO OP AMP RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
LMC6484IN 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel
LMC6484IN 鍒堕€犲晢:Texas Instruments 鍔熻兘鎻忚堪:IC OP AMP QUAD CMOS 6484 DIP14
LMC6484IN/NOPB 鍔熻兘鎻忚堪:閬嬬畻鏀惧ぇ鍣� - 閬嬫斁 CMOS Quad R/R I/O Op Amp RoHS:鍚� 鍒堕€犲晢:STMicroelectronics 閫氶亾鏁�(sh霉)閲�:4 鍏辨ā鎶戝埗姣旓紙鏈€灏忓€硷級:63 dB 杓稿叆瑁滃劅闆诲:1 mV 杓稿叆鍋忔祦锛堟渶澶у€硷級:10 pA 宸ヤ綔闆绘簮闆诲:2.7 V to 5.5 V 瀹夎棰ㄦ牸:SMD/SMT 灏佽 / 绠遍珨:QFN-16 杞�(zhu菐n)鎻涢€熷害:0.89 V/us 闂�(gu膩n)闁�:No 杓稿嚭闆绘祦:55 mA 鏈€澶у伐浣滄韩搴�:+ 125 C 灏佽:Reel