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參數(shù)資料
| 型號(hào)： | LMC555CBP/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬波形發(fā)生器 |
| 英文描述： | PULSE; RECTANGULAR, 3 MHz, TIMER, PBGA8 |
| 封裝： | ROHS COMPLIANT, MO-211BC, SMD-8 |
| 文件頁數(shù)： | 14/18頁 |
| 文件大?。?/td> | 921K |
| 代理商： | LMC555CBP/NOPB |
Application Information
MONOSTABLE OPERATION
In this mode of operation, the timer functions as a one-shot
(Figure 1). The external capacitor is initially held discharged
by internal circuitry. Upon application of a negative trigger
pulse of less than 1/3 V
S to the Trigger terminal, the flip-flop
is set which both releases the short circuit across the capaci-
tor and drives the output high.
The voltage across the capacitor then increases exponen-
tially for a period of t
H = 1.1 RAC, which is also the time that
the output stays high, at the end of which time the voltage
equals 2/3 V
S. The comparator then resets the flip-flop which
in turn discharges the capacitor and drives the output to its
low state. Figure 2 shows the waveforms generated in this
mode of operation. Since the charge and the threshold level
of the comparator are both directly proportional to supply
voltage, the timing internal is independent of supply.
Reset overrides Trigger, which can override threshold.
Therefore the trigger pulse must be shorter than the desired
t
H. The minimum pulse width for the Trigger is 20ns, and it is
400ns for the Reset. During the timing cycle when the output
is high, the further application of a trigger pulse will not effect
the circuit so long as the trigger input is returned high at least
10s before the end of the timing interval. However the
circuit can be reset during this time by the application of a
negative pulse to the reset terminal. The output will then
remain in the low state until a trigger pulse is again applied.
When the reset function is not use, it is recommended that it
be connected to V
+ to avoid any possibility of false triggering.
Figure 3 is a nomograph for easy determination of RC values
for various time delays.
Note: In monstable operation, the trigger should be driven high before the
end of timing cycle.
ASTABLE OPERATION
If the circuit is connected as shown in Figure 4 (Trigger and
Threshold terminals connected together) it will trigger itself
and free run as a multivibrator. The external capacitor
charges through R
A +RB and discharges through RB. Thus
the duty cycle may be precisely set by the ratio of these two
resistors.
In this mode of operation, the capacitor charges and dis-
charges between 1/3 V
S and 2/3 VS. As in the triggered
mode, the charge and discharge times, and therefore the
frequency are independent of the supply voltage.
Figure 5 shows the waveform generated in this mode of
operation.
00866904
FIGURE 1. Monostable (One-Shot)
00866910
VCC = 5V
Top Trace: Input 5 V/Div.
TIME = 0.1 ms/Div.
Middle Trace: Output 5 V/Div.
RA = 9.1 k
Bottom Trace: Capacitor Voltage 2 V/Div.
C = 0.01 F
FIGURE 2. Monostable Waveforms
00866911
FIGURE 3. Time Delay
00866905
FIGURE 4. Astable (Variable Duty Cycle Oscillator)
LMC555
www.national.com
5
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|---|---|
| LMC555CBPX | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| LMC555CBPX/NOPB | 功能描述:IC OSC MONO TMING 3MHZ 8MICROSMD RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 可編程計(jì)時(shí)器和振蕩器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:45 系列:- 類型:溫度 - 補(bǔ)償晶體振蕩器（TCXO） 計(jì)數(shù):- 頻率:25MHz 電源電壓:3.135 V ~ 3.465 V 電流 - 電源:1.5mA 工作溫度:-40°C ~ 85°C 封裝/外殼:16-SOIC（0.295"，7.50mm 寬） 包裝:管件 供應(yīng)商設(shè)備封裝:16-SOIC W 安裝類型:表面貼裝 |
| LMC555CH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:CMOS Timer(86.50 k) |
| LMC555CM | 功能描述:計(jì)時(shí)器和支持產(chǎn)品 RoHS:否 制造商:Micrel 類型:Standard 封裝 / 箱體:SOT-23 內(nèi)部定時(shí)器數(shù)量:1 電源電壓-最大:18 V 電源電壓-最小:2.7 V 最大功率耗散: 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝:Reel |
| LMC555CM NOPB | 制造商:National Semiconductor 功能描述:Standard Timer Single 8-Pin SOIC N Rail |
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