參數(shù)資料
型號: LM98714
廠商: National Semiconductor Corporation
英文描述: Three Channel, 16-Bit, 45 MSPS Digital Copier Analog Front End with Integrated CCD/CIS Sensor Timing Generator and LVDS Output
中文描述: 三通道,16位,45 MSPS的數(shù)碼復(fù)印機模擬前端與綜合防治荒漠化公約/獨聯(lián)體傳感器時序發(fā)生器和LVDS輸出
文件頁數(shù): 7/12頁
文件大?。?/td> 604K
代理商: LM98714
Absolute Maximum Ratings
(Notes 2,
1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage (VA,VR,VD,VC)
Voltage on Any Input Pin
(Not to exceed 4.2V)
Voltage on Any Output Pin
(execpt DVB and not to exceed
4.2V)
DVB Output Pin Voltage
Input Current at any pin other than
Supply Pins (Note 3)
Package Input Current (except
Supply Pins) (Note 3)
Maximum Junction Temperature (TA)
4.2V
0.3V to
(VA + 0.3V)
0.3V to
(VA + 0.3V)
2.0V
±
25 mA
±
50 mA
150C
Thermal Resistance (
θ
JA
)
Package Dissipation at T
A
= 25C
(Note 4)
ESD Rating (Note 5)
Human Body Model
Machine Model
Storage Temperature
Soldering process must comply with National
Semiconductor’s Reflow Temperature Profile
specifications. Refer to www.national.com/packaging.
(Note 6)
66C/W
1.89W
2500V
250V
65C to +150C
Operating Ratings
(Notes 1, 2)
Operating Temperature Range
All Supply Voltage
0C
T
A
+70C
+3.0V to +3.6V
Electrical Characteristics
The following specifications apply for VA = VD = VR = VC = 3.3V, C
L
= 10pF, and f
INCLK
= 15MHz unless otherwise specified.
Boldface limits apply for T
A
= T
MIN
to T
MAX
;
all other limits T
A
= 25C.
Symbol
CMOS Digital Input DC Specifications (RESETb, SH_R, SCLK, SENb)
V
IH
Logical “1” Input Voltage
V
IL
Logical “0” Input Voltage
I
IH
Logical “1” Input Current
Parameter
Conditions
Min
Typ
(Note 8)
Max
Units
2.0
V
V
0.8
V
IH
= VD
RESET
SH_R, SCLK
SEN
VIL = DGND
RESET
SH_R, SCLK
SEN
235
70
130
nA
μA
nA
I
IL
Logical “0” Input Current
70
235
70
μA
nA
μA
CMOS Digital Output DC Specifications (SH, CLK1 to CLK10, CMOS Data Outputs)
V
OH
Logical “1” Output Voltage
V
OL
Logical “0” Output Voltage
I
OS
Output Short Circuit Current
I
OUT
= -0.5mA
I
OUT
= 1.6mA
V
OUT
= DGND
V
OUT
= VD
V
OUT
= DGND
V
OUT
= VD
2.95
V
V
0.25
16
-20
20
-25
mA
I
OZ
CMOS Output TRI-STATE
Current
nA
CMOS Digital Input/Output DC Specifications (SDIO)
I
IH
Logical “1” Input Current
I
IL
Logical “0” Input Current
LVDS/CMOS Clock Receiver DC Specifications (INCLK+ and INCLK- Pins)
V
IHL
Differential LVDS Clock
High Threshold Voltage
V
IH
= VD
V
IL
= DGND
90
90
nA
nA
R
L
= 100W
100
mV
V
CM
(LVDS Input Common
Mode Voltage)= 1.25V
V
ILL
Differential LVDS Clock
Low Threshold Voltage
-100
mV
L
www.national.com
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