參數(shù)資料
型號(hào): LM95221
廠商: National Semiconductor Corporation
元件分類: 溫度/濕度傳感器
英文描述: Dual Remote Diode Digital Temperature Sensor with SMBus Interface
中文描述: 雙遠(yuǎn)程二極管數(shù)字溫度傳感器,帶有SMBus接口
文件頁(yè)數(shù): 5/16頁(yè)
文件大小: 282K
代理商: LM95221
Logic Electrical Characteristics
DIGITAL DC CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
DD
=+3.0 to 3.6 Vdc.
Boldface lim-
its apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
=+25C, unless otherwise noted.
Symbol
Parameter
Conditions
Typical
(Note 6)
Limits
(Note 7)
Units
(Limit)
SMBDAT, SMBCLK INPUTS
V
IN(1)
V
IN(0)
V
IN(HYST)
Logical “1” Input Voltage
Logical “0”Input Voltage
SMBDAT and SMBCLK Digital Input
Hysteresis
Logical “1” Input Current
Logical “0” Input Current
Input Capacitance
SMBDAT OUTPUT
I
OH
High Level Output Current
V
OL
SMBus Low Level Output Voltage
2.1
0.8
V (min)
V (max)
mV
400
I
IN(1)
I
IN(0)
C
IN
V
IN
= V
DD
V
IN
= 0 V
0.005
0.005
5
±
10
±
10
μA (max)
μA (max)
pF
V
OH
= V
DD
I
OL
= 4mA
I
OL
= 6mA
10
0.4
0.6
μA (max)
V (max)
SMBus DIGITAL SWITCHING CHARACTERISTICS
Unless otherwise noted, these specifications apply for V
=+3.0 Vdc to
+3.6 Vdc, C
(load capacitance) on output lines = 80 pF.
Boldface limits apply for T
= T
= T
to T
;
all other limits T
A
= T
= +25C, unless otherwise noted. The switching characteristics of the LM95221 fully meet or exceed the published specifi-
cations of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBDAT sig-
nals related to the LM95221. They adhere to but are not necessarily the SMBus bus specifications.
Symbol
Parameter
Conditions
Typical
(Note 6)
Limits
(Note 7)
100
10
4.7
25
4.0
Units
(Limit)
kHz (max)
kHz (min)
μs (min)
ms (max)
μs (min)
μs (max)
μs (max)
ns (max)
f
SMB
SMBus Clock Frequency
t
LOW
SMBus Clock Low Time
from V
IN(0)
max to V
IN(0)
max
t
HIGH
t
R,SMB
t
F,SMB
t
OF
SMBus Clock High Time
SMBus Rise Time
SMBus Fall Time
Output Fall Time
from V
IN(1)
min to V
IN(1)
min
(Note 12)
(Note 13)
C
L
= 400pF,
I
O
= 3mA, (Note 13)
1
0.3
250
t
TIMEOUT
SMBDAT and SMBCLK Time Low for Reset of
Serial Interface (Note 14)
t
SU;DAT
Data In Setup Time to SMBCLK High
t
HD;DAT
Data Out Stable after SMBCLK Low
25
35
250
300
900
100
ms (min)
ms (max)
ns (min)
ns (min)
ns (max)
ns (min)
t
HD;STA
Start Condition SMBDAT Low to SMBCLK
Low (Start condition hold before the first clock
falling edge)
Stop Condition SMBCLK High to SMBDAT
Low (Stop Condition Setup)
SMBus Repeated Start-Condition Setup Time,
SMBCLK High to SMBDAT Low
SMBus Free Time Between Stop and Start
Conditions
t
SU;STO
100
ns (min)
t
SU;STA
0.6
μs (min)
t
BUF
1.3
μs (min)
L
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