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參數(shù)資料
| 型號： | LM85 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | Hardware Monitor with Integrated Fan Control |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PDSO24 |
| 封裝： | QSOP-24 |
| 文件頁數(shù)： | 16/26頁 |
| 文件大?。?/td> | 261K |
| 代理商： | LM85 |
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Functional Description
(Continued)
TABLE 3. Temperature Limits vs Register Settings
Temperature
127C
.
.
.
50C
.
.
.
0C
.
.
.
50C
.
.
.
127C
Reading (Decimal)
127
.
.
.
50
.
.
.
0
.
.
.
50
.
.
.
127
Reading (Hex)
81h
.
.
.
CEh
.
.
.
00h
.
.
.
32h
.
.
.
7Fh
4.13 Registers 54-5Bh: Fan Tachometer Low Limit
Register
Address
54h
55h
56h
57h
58h
59h
5Ah
5Bh
Read/
Write
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Register
Name
Tach1 Minimum LSB
Tach1 Minimum MSB
Tach2 Minimum LSB
Tach2 Minimum MSB
Tach3 Minimum LSB
Tach3 Minimum MSB
Tach4 Minimum LSB
Tach4 Minimum MSB
Bit 7
(MSB)
7
15
7
15
7
15
7
15
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
0
8
0
8
0
8
0
8
Default
Value
FFh
FFh
FFh
FFh
FFh
FFh
FFh
FFh
6
14
6
14
6
14
6
14
5
13
5
13
5
13
5
13
4
12
4
12
4
12
4
12
3
11
3
11
3
11
3
11
2
10
2
10
2
10
2
10
1
9
1
9
1
9
1
9
The Fan Tachometer Low Limit registers indicate the tachometer reading under which the corresponding bit will be set in the
Interrupt Status Register 2 register. In Auto Fan Control mode, the fan can run at low speeds, so care should be taken in software
to ensure that the limit is high enough not to cause sporadic alerts. The fan tachometer will not cause a bit to be set in Interrupt
Status Register 2 if the current value in Current PWM Duty registers is 00h or if the fan 1 disabled via the Fan Configuration
Register. Interrupts will never be generated for a fan if its minimum is set to FF FFh.
Given the insignificance of Bit 0 and Bit 1, these bits could be programmed to remember which fan is which, as follows.
Fan
CPU
Memory
Chassis Front
Chassis Rear
Bit 1
0
0
1
1
Bit 0
0
1
0
1
Setting the Ready/Lock/Start/Override register Lock bit has no effect these registers.
4.14 Registers 5C-5Eh: Fan Configuration
Register
Address
5Ch
5Dh
5Eh
Read/
Write
R/W
R/W
R/W
Register
Name
Fan1 Configuration
Fan2 Configuration
Fan3 Configuration
Bit 7
(MSB)
ZON2
ZON2
ZON2
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
(LSB)
SPIN0
SPIN0
SPIN0
Default
Value
62h
62h
62h
Lock
ZON1
ZON1
ZON1
ZON0
ZON0
ZON0
INV
INV
INV
RES
RES
RES
SPIN2
SPIN2
SPIN2
SPIN1
SPIN1
SPIN1
U
U
U
L
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