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參數(shù)資料
| 型號(hào)： | LM6118N |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 運(yùn)動(dòng)控制電子 |
| 英文描述： | Fast Settling Dual Operational Amplifiers |
| 中文描述： | DUAL OP-AMP, 2500 uV OFFSET-MAX, 17 MHz BAND WIDTH, PDIP8 |
| 封裝： | PLASTIC, DIP-8 |
| 文件頁(yè)數(shù)： | 7/13頁(yè) |
| 文件大小： | 836K |
| 代理商： | LM6118N |
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Application Information
(Continued)
Examples of unity gain connections for a voltage follower, In-
verter, and integrator driving capacitive loads up to 1000 pF
are shown here. Different R1–C1 time constants and capaci-
tive loads will have an effect on settling times.
Input Bias Current Compensation
Input bias current of the first op amp can be reduced or bal-
anced out by the second op amp. Both amplifiers are laid out
in mirror image fashion and in close proximity to each other,
thus both input bias currents will be nearly identical and will
track with temperature. With both op amp inputs at the same
potential, a second op amp can be used to convert bias cur-
rent to voltage, and then back to current feeding the first op
amp using large value resistors to reduce the bias current to
the level of the offset current.
Examples are shown here for an inverting application, (a)
where the inputs are at ground potential, and a second cir-
cuit (b) for compensating bias currents for both inputs.
Voltage Follower
DS010254-10
For C
L
= 1000 pF, Small signal BW = 5 MHz
20 V
p-p
BW = 500 kHz
Inverter
DS010254-11
Settling time to 0.01%, 10V Step
For C
L
= 1000 pF, settling time
≈
1500 ns
For C
L
= 300 pF, settling time
≈
500 ns
Integrator
DS010254-12
www.national.com
7
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