參數(shù)資料
型號(hào): LM5115SD
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: Secondary Side Post Regulator Controller
中文描述: 2.5 A SWITCHING CONTROLLER, PDSO16
封裝: LLP-16
文件頁(yè)數(shù): 14/17頁(yè)
文件大?。?/td> 725K
代理商: LM5115SD
Gate Drivers Outputs (HO & LO)
(Continued)
voltage transients due to parasitic inductances and the high
peak output currents of the drivers. The recommended range
of the HB capacitor is 0.047μF to 0.22μF.
Both drivers are controlled by the PWM logic signal from the
PWM latch. When the phase signal is low, the outputs are
held in the reset state with the low side MOSFET on and the
high side MOSFET off. When the phase signal switches to
the high state, the PWM latch reset signal is de-asserted.
The high side MOSFET remains off until the PWM latch is
set by the PWM comparator (CRMIX
>
CV as shown in
Figure 4
). When the PWM latch is set, the LO driver turns off
the low side MOSFET and the HO driver turns on the high
side MOSFET. The high side pulse is terminated when the
phase signal falls and SYNC input comparator resets the
PWM latch.
Free-Run Mode
The LM5115 can be operated as a conventional synchro-
nous buck controller with a dc input supply instead of the
square wave phase signal. In the dc or free-run mode, the
LM5115 PWM controller synchronizes to an internal clock
signal instead of the phase signal pulses. The clock fre-
quency in the free-run mode is programmed by the SYNC
pin resistor and RAMP pin capacitor. Connecting a resistor
between a dc bias supply and the SYNC pin produces a
current I
which controls the charging current of the
RAMP pin capacitor . The RAMP capacitor is charged until
its voltage reaches the free-run mode peak threshold of
2.25V. The RAMP capacitor is then discharged for 300ns
before beginning a new PWM cycle. The 300ns reset time of
the RAMP pin sets the minimum off time of the PWM con-
troller in the free-run mode. The internal clock frequency in
the free-run mode is set by the synchronization current,
ramp capacitor, free-run peak threshold, and 300ns dead-
time.
F
CLK
)
1 / ((C
RAMP
x 2.25V) / (I
SYNC
x 3) + 300ns)
See the LM5115 dc evaluation board application note for
more information on the free-run mode.
Thermal Protection
Internal thermal shutdown circuitry is provided to protect the
integrated circuit in the event the maximum junction tem-
perature limit is exceeded. When activated, typically at 165
degrees Celsius, the controller is forced into a low power
standby state with the output drivers and the bias regulator
disabled. The device will restart when the junction tempera-
ture falls below the thermal shutdown hysteresis, which is
typically 25 degrees. The thermal protection feature is pro-
vided to prevent catastrophic failures from accidental device
overheating.
L
www.national.com
14
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