參數(shù)資料
型號(hào): LM5115MMX
廠商: National Semiconductor Corporation
英文描述: Secondary Side Post Regulator Controller
中文描述: 次級(jí)端后穩(wěn)壓控制器
文件頁數(shù): 3/17頁
文件大?。?/td> 725K
代理商: LM5115MMX
Pin Description
(Continued)
PIN
9
NAME
SYNC
DESCRIPTION
APPLICATION INFORMATION
Synchronization input
A low impedance current input pin. The current into this pin sets
the RAMP capacitor charge current and the frequency of an
internal oscillator that provides a clock for the free-run (DC
input) mode .
Connect directly to the analog ground pin (AGND).
Connect to the gate of the low side synchronous MOSFET
through a short low inductance path.
Nominal 7V output from the internal LDO bias regulator. Locally
decouple to PGND using a low ESR/ESL capacitor located as
close to controller as possible.
Connect to negative terminal of the bootstrap capacitor and the
source terminal of the high side MOSFET.
Connect to the gate of high side MOSFET through a short low
inductance path.
Connect to the cathode of the bootstrap diode and the positive
terminal of the bootstrap capacitor. The bootstrap capacitor
supplies current to charge the high side MOSFET gate and
should be placed as close to controller as possible.
Input to the LDO bias regulator that powers internal blocks..
Input range of VBIAS is 4.5V to 30V.
Internally bonded to the die substrate. Connect to system
ground for low thermal impedance.
10
11
PGND
LO
Power Ground
Low side gate driver output
12
VCC
Output of bias regulator
13
HS
High side MOSFET source connection
14
HO
High side gate driver output
15
HB
High side gate driver bootstrap rail
16
VBIAS
Supply Bias Input
-
Exposed Pad
(LLP
Package
Only)
Exposed Pad, underside of LLP package
L
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