參數資料
型號: LM5109
廠商: National Semiconductor Corporation
英文描述: 100V / 1A Peak Half Bridge Gate Driver
中文描述: 100V的/ 1A條山頂半橋柵極驅動器
文件頁數: 4/9頁
文件大?。?/td> 657K
代理商: LM5109
Switching Characteristics
Specifications in standard typeface are for T
= +25C, and those in
boldface type
apply over the full
operating junction tem-
perature range
. Unless otherwise specified, V
DD
= V
HB
= 12V, V
SS
= V
HS
= 0V, No Load on LO or HO.
Symbol
Parameter
Conditions
LM5109
t
LPHL
Lower Turn-Off Propagation Delay (LI
Falling to LO Falling)
t
HPHL
Upper Turn-Off Propagation Delay (HI
Falling to HO Falling)
t
LPLH
Lower Turn-On Propagation Delay (LI
Rising to LO Rising)
t
HPLH
Upper Turn-On Propagation Delay (HI
Rising to HO Rising)
t
MON
Delay Matching: Lower Turn-On and
Upper Turn-Off
t
MOFF
Delay Matching: Lower Turn-Off and
Upper Turn-On
t
RC
, t
FC
Either Output Rise/Fall Time
C
L
= 1000 pF
t
PW
Minimum Input Pulse Width that
Changes the Output
Min
Typ
Max
Units
27
56
ns
27
56
ns
29
56
ns
29
56
ns
2
15
ns
2
15
ns
15
-
ns
50
ns
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2:
The human body model is a 100 pF capacitor discharged through a 1.5k
resistor into each pin. Pin 6 , Pin 7 and Pin 8 are rated at 500V.
Note 3:
4 layer board with Cu finished thickness 1.5/1/1/1.5 oz. Maximum die size used. 5x body length of Cu trace on PCB top. 50 x 50mm ground and power
planes embedded in PCB. See Application Note AN-1187.
Note 4:
Min and Max limits are 100% production tested at 25C. Limits over the operating temperature range are guaranteed through correlation using Statistical
Quality Control (SQC) methods. Limits are used to calculate National’s Average Outgoing Quality Level (AOQL).
Note 5:
The
θ
JA
is not a constant for the package and depends on the printed circuit board design and the operating conditions.
Note 6:
In the application the HS node is clamped by the body diode of the external lower N-MOSFET, therefore the HS voltage will generally not exceed -1V.
However in some applications, board resistance and inductance may result in the HS node exceeding this stated voltage transiently.
If negative transients occur on HS, the HS voltage must never be more negative than V
DD
- 15V. For example, if V
DD
= 10V, the negative transients at HS must not
exceed -5V.
L
www.national.com
4
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相關代理商/技術參數
參數描述
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