參數(shù)資料
型號: LM5102MMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 外設(shè)及接口
英文描述: High Voltage Half-Bridge Gate Driver with Programmable Delay
中文描述: 1.8 A HALF BRIDGE BASED PRPHL DRVR, PDSO10
封裝: MSOP-10
文件頁數(shù): 2/13頁
文件大小: 368K
代理商: LM5102MMX
Connection Diagram
Ordering Information
Ordering Number
LM5102MM
LM5102MMX
LM5102SD
LM5102SDX
Package Type
MSOP-10
MSOP-10
LLP-10
LLP-10
NSC Package Drawing
MUB10A
MUB10A
SDC10A
SDC10A
Supplied As
1000 shipped as Tape & Reel
3500 shipped as Tape & Reel
1000 shipped as Tape & Reel
4500 shipped as Tape & Reel
Pin Descriptions
Pin
Name
Description
Application Information
MSOP-10
1
LLP-10
1
V
DD
Positive gate drive supply
Locally decouple to V
SS
using low ESR/ESL capacitor, located as
close to IC as possible.
Connect the positive terminal of bootstrap capacitor to the HB pin
and connect negative terminal of bootstrap capacitor to HS. The
Bootstrap capacitor should be placed as close to IC as possible.
Connect to gate of high side MOSFET with short low inductance
path.
Connect bootstrap capacitor negative terminal and source of high
side MOSFET.
Resistor from RT1 to ground programs the leading edge delay of
the high side gate driver. The resistor should be placed close to the
IC to minimize noise coupling from adjacent traces.
Resistor from RT2 to ground programs the leading edge delay of
the low side gate driver. The resistor should be placed close to the
IC to minimize noise coupling from adjacent traces.
TTL compatible thresholds. Unused inputs should be tied to ground
and not left open.
TTL compatible thresholds. Unused inputs should be tied to ground
and not left open.
All signals are referenced to this ground.
Low side gate driver output Connect to the gate of the low side MOSFET with a short low
inductance path.
Note: For LLP-10 package, it is recommended that the exposed pad on the bottom of the LM5100 / LM5101 be soldered to ground plane on the PC board,
and the ground plane should extend out from beneath the IC to help dissipate the heat.
.
2
2
HB
High side gate driver
bootstrap rail
3
3
HO
High side gate driver
output
High side MOSFET source
connection
High side output edge
delay programming
4
4
HS
5
5
RT1
6
6
RT2
Low side output edge
delay programming
7
7
HI
High side driver control
input
Low side driver control
input
Ground return
8
8
LI
9
10
9
10
V
SS
LO
20088901
10-Lead MSOP, LLP
See NS Numbers MUB10A and SDC10A
FIGURE 2.
L
www.national.com
2
相關(guān)PDF資料
PDF描述
LM5102SDX High Voltage Half-Bridge Gate Driver with Programmable Delay
LM5102SD High Voltage Half-Bridge Gate Driver with Programmable Delay
LM5107 100V / 1.4A Peak Half Bridge Gate Driver
LM5109SD 100V / 1A Peak Half Bridge Gate Driver
LM5109SDX 100V / 1A Peak Half Bridge Gate Driver
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