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參數(shù)資料
| 型號： | LM5067SDX-2 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 電源管理 |
| 英文描述： | 2-CHANNEL POWER SUPPLY SUPPORT CKT, DSO10 |
| 封裝： | LLP-10 |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 690K |
| 代理商： | LM5067SDX-2 |
Absolute Maximum Ratings (Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Current into VCC (100 s pulse)
100 mA
OUT, PGD to VEE
-0.3V to 100V
UVLO, OVLO to VEE
-0.3V to 17V
SENSE to VEE
-0.3V to +0.3V
ESD Rating (Note 2)
Human Body Model
2kV
Storage Temperature
-65°C to +150°C
Junction Temperature
+150°C
Operating Ratings
Current into VCC (Note 5)
2 mA (min)
OUT Voltage above VEE
0V to 80V
PGD Off Voltage above VEE
0V to 80V
Junction Temperature
40°C to +125°C
Electrical Characteristics Limits in standard type are for T
J = 25°C only; limits in boldface type apply over the
junction temperature (T
J) range of -40°C to +125°C. Minimum and Maximum limits are guaranteed through test, design, or statistical
correlation. Typical values represent the most likely parametric norm at T
J = 25°C, and are provided for reference purposes only.
Unless otherwise stated the following conditions apply: I
CC = 2 mA, OUT Pin = 48V above VEE, all voltages are with respect to
VEE. See (Note 3).
Symbol
Parameter
Conditions
Min.
Typ.
Max.
Units
Input
V
Z
Operating voltage, VCC – VEE
I
CC = 2 mA, UVLO = 5V
12.35
13
13.65
V
I
CC-EN
Internal operating current, enabled
VCC-VEE = 11V,
UVLO = 5V
0.8
1
mA
I
CC-DIS
Internal operating current, disabled
VCC-VEE = 11V,
UVLO = 2V
480
660
A
POR
IT
Threshold voltage to start insertion timer
VCC-VEE increasing
7.7
8.2
V
POR
EN
Threshold voltage to enable all functions
VCC-VEE increasing
8.4
8.7
V
POR
EN-HYS
POR
EN hysteresis
VCC-VEE decreasing
125
mV
OUT Pin
I
OUT-EN
OUT bias current, enabled
OUT = VEE, Normal operation
0.1
A
I
OUT-DIS
OUT bias current, disabled
Disabled, OUT = VEE + 48V
50
SENSE Pin
I
SNS-EN
SENSE bias current, enabled
OUT = VEE, Normal operation
-6
A
I
SNS-DIS
SENSE bias current, disabled
Disabled, OUT = VEE + 48V
-50
UVLO, OVLO Pins
UVLO
TH
UVLO threshold
2.45
2.5
2.55
V
UVLO
HYS
UVLO hysteresis current
UVLO = VEE + 2V
10
22
34
A
UVLO
DEL
UVLO delay
Delay to GATE high
26
s
Delay to GATE low
12
s
UVLO
BIAS
UVLO bias current
UVLO = VEE + 5V
1
A
OVLO
TH
OVLO threshold
2.43
2.5
2.57
V
OVLO
HYS
OVLO hysteresis current
OVLO = VEE+2.8V
-34
-22
-10
A
OVLO
DEL
OVLO delay
Delay to GATE high
26
s
Delay to GATE low
12
s
OVLO
BIAS
OVLO bias current
OVLO = VEE + 2.4V
1
A
Gate Control (GATE Pin)
I
GATE
Source current
Normal Operation
-72
-52
-32
A
Sink current
UVLO < 2.5V
1.9
2.2
2.68
mA
SENSE - VEE =150 mV or
VCC - VEE < POR
IT, VGATE = 5V
45
110
200
V
GATE
Gate output voltage in normal operation
GATE-VEE voltage
V
Z
V
3
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LM5067
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