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參數(shù)資料
| 型號： | LM5021NA-2/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | 0.7 A SWITCHING CONTROLLER, 560 kHz SWITCHING FREQ-MAX, PDIP8 |
| 封裝： | LEAD FREE, PLASTIC, DIP-8 |
| 文件頁數(shù)： | 3/15頁 |
| 文件大小： | 747K |
| 代理商： | LM5021NA-2/NOPB |
Detailed Operating Description (Continued)
SKIP CYCLE OPERATION
During light load conditions, the efficiency of the switching
power supply typically drops as the losses associated with
switching and operating bias currents of the converter be-
come a significant percentage of the power delivered to the
load. The largest component of the power loss is the switch-
ing loss associated with the gate driver and external MOS-
FET gate charge. Each PWM cycle consumes a finite amout
of energy as the MOSFET is turned on and then turned off.
These switching losses are proportional to the frequency of
operation. The Skip Cycle function integrated within the
LM5021 controller reduces the average switching frequency
to reduce switching losses and improve efficiency during
light load conditions.
When a light load condition occurs, the COMP pin voltage is
reduced by the voltage feedback loop to reduce the peak
current delivered by the controller. Referring to Figure 6, the
PWM comparator input tracks the COMP pin voltage through
a 1.25V level shift circuit and a 3:1 resistor divider. As the
COMP pin voltage falls, the input to the PWM comparator
falls proportionately. When the PWM comparator input falls
to 125mV, the Skip Cycle comparator detects the light load
condition and disables output pulses from the controller. The
controller continues to skip switching cycles until the power
supply output falls and the COMP pin voltage increases to
demand more output current. The number of cycles skipped
will depend on the load and the response time of the fre-
quency compensation network. Eventually the COMP volt-
age will increase when the voltage loop requires more cur-
rent to sustain the regulated output voltage. When the PWM
comparator input exceeds 130mV (5mV hysteresis), normal
fixed frequency switching resumes. Typical power supply
designs will produce a short burst of output pulses followed
by a long skip cycle interval. The average switching fre-
quency in the Skip Cycle mode can be a small fraction of the
normal operating frequency of the power supply.
20144221
FIGURE 5. Waveform at SS and COMP Pin due to Brief Overload
LM5021
www.national.com
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