參數(shù)資料
型號(hào): LM5010
廠商: National Semiconductor Corporation
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: RADIATION HARDENED HIGH EFFICIENCY, 5 AMP SWITCHING REGULATORS
中文描述: 抗輻射高效,5安培開關(guān)穩(wěn)壓器
文件頁(yè)數(shù): 17/19頁(yè)
文件大?。?/td> 453K
代理商: LM5010
Applications Information
(Continued)
(12)
where 0.11
is the minimum value of the internal resistance
from S
to I
. The next smaller standard value resistor
should be used for R
. With the addition of R
it is neces-
sary to check the average and peak current values to ensure
they do not exceed the LM5010 limits. At maximum load
current the average current through the internal sense resis-
tor is:
(13)
If I
is less than 2.0A no changes are necessary. If it
exceeds 2.0A, R
CL
must be reduced. The upper peak of the
inductor current (I
), at maximum load current, is calcu-
lated using the following:
(14)
where I
OR(max)
is calculated using Equation 9. If I
PK+
ex-
ceeds 3.5A , the inductor value must be increased to reduce
the ripple amplitude. This will necessitate recalculation of
I
OR(min)
, I
PK-
, and R
CL
.
When the circuit is in current limit, the upper peak current out
of the SW pin is
The inductor L1 and diode D1 must be rated for this current.
PC BOARD LAYOUT
The LM5010 regulation, over-voltage, and current limit com-
parators are very fast, and will respond to short duration
noise pulses. Layout considerations are therefore critical for
optimum performance. The layout must be as neat and
compact as possible, and all the components must be as
close as possible to their associated pins. The current loop
formed by D1, L1, C2, and the S
GND
and I
SEN
pins should be
as small as possible. The ground connection from C2 to C1
should be as short and direct as possible. If it is expected
that the internal dissipation of the LM5010 will produce high
junction temperatures during normal operation, good use of
the PC board’s ground plane can help considerably to dissi-
pate heat. The exposed pad on the IC package bottom can
be soldered to a ground plane, and that plane should both
extend from beneath the IC, and be connected to exposed
ground plane on the board’s other side using as many vias
as possible. The exposed pad is internally connected to the
IC substrate.
The use of wide PC board traces at the pins, where possible,
can help conduct heat away from the IC. The four No Con-
nect pins on the TSSOP package are not electrically con-
nected to any part of the IC, and may be connected to
ground plane to help dissipate heat from the package. Judi-
cious positioning of the PC board within the end product,
along with the use of any available air flow (forced or natural
convection) can help reduce the junction temperature.
L
www.national.com
17
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