參數(shù)資料
型號(hào): LM4850MTX/NOPB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): 音頻/視頻放大
英文描述: 0.3 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO14
封裝: 4.40 MM, PLASTIC, TSSOP-14
文件頁(yè)數(shù): 4/18頁(yè)
文件大?。?/td> 1273K
代理商: LM4850MTX/NOPB
Application Information (Continued)
without producing audible distortion. However, the designer
must make sure that the chosen power supply voltage and
output load does not violate the conditions explained in the
Power Dissipation section.
Once the power dissipation equations have been addressed,
the required differential gain can be determined from Equa-
tion 7.
(7)
R
F /RI =AVD / 2
(8)
From Equation 6, the minimum A
VD is 2.83; use AVD =3.
The desired input impedance was 20k
, and with an A
VD of
3, using Equation 8 results in an allocation of R
I = 20k and
R
F = 30k.
The final design step is to set the amplifier’s 3dB frequency
bandwidth. To achieve the desired ± 0.25dB pass band
magnitude variation limit, the low frequency response must
extend to at least onefifth the lower bandwidth limit and the
high frequency response must extend o at least five times
the upper bandwidth limit. The variation for both response
limits is 0.17dB, well within the ± 0.25dB desired limit. This
results in:
f
L = 100Hz / 5 = 20Hz
f
H = 20kHz x 5 = 100kHz
As stated in the External Components section, R
I in con-
junction with C
I create a highpass filter. Find the coupling
capacitor’s value using Equation 9.
C
I ≥ 1/(2πRIfL)
(9)
C
I ≥ 1/(2π x 20k x 20Hz) = 0.397F
Use a 0.39F capacitor, the closest standard value.
The high frequency pole is determined by the product of the
desired high frequency pole, f
H, and the differential gain,
A
VD. With AVD = 3 and fH = 100kHz, the resulting GBWP =
150kHz which is much smaller than the LM4850 GBWP of
10MHz. This difference indicates that a designer can still use
the LM4850 at higher differential gains without bandwidth
limitations.
PCB LAYOUT AND SUPPLY REGULATION
CONSIDERATIONS FOR DRIVING 3
AND 4 LOADS
Power dissipated by a load is a function of the voltage swing
across the load and the load’s impedance. As load imped-
ance decreases, load dissipation becomes increasingly de-
pendant on the interconnect (PCB trace and wire) resistance
between the amplifier output pins and the load’s connec-
tions. Residual trace resistance causes a voltage drop,
which results in power dissipated in the trace and not in the
load as desired. For example, 0.1
trace resistance reduces
the output power dissipated by a 4
load from 2.0W to
1.95W. This problem of decreased load dissipation is exac-
erbated as load impedance decreases. Therefore, to main-
tain the highest load dissipation and widest output voltage
swing, PCB traces that connect the output pins to a load
must be as wide as possible.
Poor power supply regulation adversely affects maximum
output power. A poorly regulated supply’s output voltage
decreases with increasing load current. Reduced supply
voltage causes decreased headroom, output signal clipping,
and reduced output power. Even with tightly regulated sup-
plies, trace resistance creates the same effects as poor
supply regulation. Therefore, making the power supply
traces as wide as possible helps maintain full output voltage
swing.
LM4850
www.national.com
12
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