參數(shù)資料
型號(hào): LM4832N
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻控制
英文描述: Digitally Controlled Tone and Volume Circuit with Stereo Audio Power Amplifier, Microphone Preamp Stage and National 3D Sound
中文描述: 2 CHANNEL(S), TONE CONTROL CIRCUIT, PDIP28
封裝: DIP-28
文件頁(yè)數(shù): 3/22頁(yè)
文件大?。?/td> 688K
代理商: LM4832N
Electrical Characteristics for Entire IC
(Notes 1, 2) (Continued)
The following specifications apply for V
DD
= 5V unless otherwise noted. Limits apply for T
A
= 25C.
Symbol
Parameter
Conditions
LM4832
Units
(Limits)
Typical
(Note 6)
Limit
(Note 7)
AUDIO PATH
P
O
Output Power
THD = 1.0% (max), f = 1 kHz, All
controls at 0dB
R
L
= 8
R
L
= 32
All Controls at 0 dB, THD = 10%, f = 1
kHz
R
L
= 8
P
O
= 200 mW, R
L
= 8
P
O
= 75 mW, R
L
= 32
V
O
= 1 Vrms, R
L
= 10
C
B
= 1 μF, f = 100 Hz, V
RIPPLE
= 100
mVrms, All Controls at 0 dB Setting
f = 1 kHz, V
IN
= 1V
P
O
= 200 mW, R
L
= 8
,
All controls at 0 dB setting,
f = 1 kHz
Left to Right
Right to Left
250
95
mW (min)
mW (min)
75
THD+N
Total Harmonic Distortion+Noise
350
0.15
0.11
0.08
45
mW
%
%
%
dB
PSRR
Power Supply Rejection Ratio
A
M
X
TALK
Mute Attenuation
Cross Talk
75
dB
85
72
dB
dB
MICROPHONE PREAMP AND VOLUME CONTROL
A
V
Preamp Gain
0 dB Gain
+20 dB Gain
+30 dB Gain
Gain at +18 dB Setting
Attenuation at 42 dB Setting
0 dB to 42 dB
0
1, 1
19, 21
29, 31
20
43
dB
dB
dB
20
30
A
R
Attenuator Range
dB (max)
dB (min)
dB
dB (max)
V
rms
μV (min)
dB
A
S
Step Size
Step Size Error
Output Voltage Swing
Input Referred Noise
Power Supply Rejection Ratio
3
0.4
1.7
7
35
V
SWING
E
NO
PSRR
f = 1 kHz, THD
<
1.0%, R
L
= 1 k
A-Weighted, Attenuator at 0 dB
f = 100 Hz, V
RIPPLE
= 100 mVrms,
C
B
= 1 μF
A
M
X
TALK
THD+N
Mute Attenuation
Cross Talk
Total Harmonic Distortion Plus Noise
90
90
dB
dB
Power Amp P
O
= 200 mW, f = 1 kHz
All controls at 0 dB, f = 1 kHz, V
O
= 1V
0 dB Setting
+20 dB Gain
+30 dB Gain
0.03
0.03
0.04
%
%
%
I
2
C BUS TIMING
f
MAX
T
START:HOLD
Maximum Bus Frequency
Start Signal: Hold Time before
Clock/Data Transitions
Data Setup Time
Minimum High Clock Duration
Minimum Low Clock Duration
Stop Signal: Setup Time before
Clock/Data Transitions
I
2
C BUS INPUT AND OUTPUT
V
IL
Input Low Voltage
400
0.6
kHz
μs
T
D;SETUP
T
C;HIGH
T
C;LOW
T
STOP;SETUP
0.1
0.6
1.3
0.6
μs
μs
μs
μs
1.5
V (max)
3
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