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參數(shù)資料
| 型號： | LM4801MH/NOPB |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 音頻／視頻放大 |
| 英文描述： | 1.5 W, 2 CHANNEL, AUDIO AMPLIFIER, PDSO28 |
| 封裝： | 4.40 MM, TSSOP-28 |
| 文件頁數(shù)： | 10/20頁 |
| 文件大?。?/td> | 725K |
| 代理商： | LM4801MH/NOPB |
Application Information (Continued)
The delay time for the application of Figure 5 is set as
follows:
The application is set for a reset delay time of 8.8ms. Note
that the comparator should have high impedance inputs so
as to not load down the V
REF at the CC pin of the LM4801.
Shutdown
The LM4801’s LDO goes into sleep mode when the SHDN
pin is in a logic low condition. During this condition, the pass
transistor, error amplifier, and bandgap are turned off, reduc-
ing the supply current to 1nA typical. The maximum guaran-
teed voltage for a logic low at the SHDN pin is 0.4V. A
minimum guaranteed voltage of 2V at the SHDN pin will turn
the LDO back on. The SHDN pin may be directly tied to V
IN
to keep the part on. The SHDN pin may exceed V
IN but not
the ABS MAX of 6.5V.
Figure 6 shows an application that uses the SHDN pin. It
detects when the battery is too low and disconnects the load
by turning off the regulator. A micropower comparator
(LMC7215) and reference (LM385) are combined with resis-
tors to set the minimum battery voltage. At the minimum
battery voltage, the comparator output goes low and tuns off
the LDO and corresponding load. Hysteresis is added to the
minimum battery threshold to prevent the battery’s recovery
voltage from falsely indicating an above minimum condition.
When the load is disconnected from the battery, it automati-
cally increases in terminal voltage because of the reduced IR
drop across its internal resistance. The Minimum battery
detector of figure 6 has a low detection threshold (V
LT)of
3.6V that corresponds to the minimum battery voltage. The
upper threshold (V
UT) is set for 4.6V in order to exceed the
recovery voltage of the battery.
Resistor value for V
UT and VLT are determined as follows:
(The application of Figure 6 used a G
T of 5 mho)
The above procedure assumes a rail-to-rail output compara-
tor. Essentially, R
2 is in parallel with R1 prior to reaching the
lower threshold, then R
2 becomes parallel with R3 for the
upper threshold. Note that the application requires rail-to-rail
input as well.
The resistor values shown in Figure 7 are the closest prac-
tical to calculated values.
Fast Start-up
The LM4801’s LDO provides fast start-up time for better
system efficiency. The start-up speed is maintained when
using the optional noise bypass capacitor. An internal 500A
current source charges the capacitor until it reaches about
90% of its final value.
RECOMMENDED PRINTED CIRCUIT BOARD LAYOUT
Figures 8 through 10 show the recommended two-layer PC
board layout that is optimized for the 28-pin MH-packaged
LM4801 and associated components. These circuits are
designed for use with an external 5V supply and 8
(or
greater) speakers.
This circuit board is easy to use. Apply 5V and ground to the
board’s V
DD and GND pads, respectively. Connect speakers
between the board’s -OUTA and +OUTA and OUTB and
200736B9
FIGURE 6. Power on Delayed Reset Application
200736C0
FIGURE 7. Minimum Battery Detector that Disconnects
the Load Via the SHDN Pin of the LM4801
LM4801
www.national.com
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