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參數(shù)資料
| 型號： | LM4550VH |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP48 |
| 封裝： | 7 X 7 X 1.40 MM, LQFP-48 |
| 文件頁數(shù)： | 17/25頁 |
| 文件大小： | 507K |
| 代理商： | LM4550VH |
Application Information
(Continued)
Bit
Description
Comment
15
Valid Frame
1 = This frame has valid
data.
1 = Control Address is
valid.
14
Control register
address
Control register
data
Left Playback
PCM Data
Right Playback
PCM Data
13
1 = Control Data is valid.
12
1 = Left PCM Data is valid.
11
1 = Right PCM Data is
valid.
1 = Center PCM Data is
valid.
1 = PCM Left Surround is
valid.
1 = PCM Right Surround is
valid.
1 = PCM LFE is valid.
9
PCM Center
8
PCM Left
Surround
PCM Right
Surround
PCM LFE
7
6
SDATA_OUT Slot 1: Control Address
Slot 1 is used both to write to the LM4550 registers as well
as read back a register’s current value. The MSB of Slot 1
(bit 19) signifies whether the current control operation is a
read or a write. Bits 18 through 12 are used to specify the
register address of the read or write operation. The least
significant twelve bits are reserved and should be stuffed
with zeros by the AC’97 controller.
Bits
19
Description
Read/Write
Control
Register
Reserved
Comment
1 = Read, 0 = Write
Identifies the Control
Register
Set to "0"
18:12
11:0
SDATA_OUT Slot 2: Control Data
Slot 2 is used to transmit 16 bit control data to the LM4550 in
the event that the current operation is a write operation. The
least significant four bits should be stuffed with zeros by the
AC ’97 controller. If the current operation is a register read,
the entire slot, bits 19 through 0 should be stuffed with zeros.
Bits
Description
Control
Register Write
Data
Reserved
Comment
19:4
Set bits to "0" if read
operation
3:0
Set to "0"
SDATA_OUT Slot 3 and 4: PCM Playback Left , Right
Channel
Bits
Description
PCM Audio
Data for Left
/RightDACs
Comment
19:0
Set unused bits to "0"
Slot 3 and 4 are 20 bit fields used to transmit data intended
for the left/right DACs on the LM4550. Any unused bits
should be padded with zeros. The LM4550 DAC’s have 18
bit resolution and thus will use the first 18 bits of the 20 bit
PCM stream.
SDATA_OUT Slot 7 and 8: PCM Playback Left/Right
Surround
Bits
Description
PCM Audio
Data for
Left/Right
Surround
Comment
19:0
Set unused bits to "0"
SDATA_OUT Slot 6 and 9: PCM Playback Center/LFE
Bits
Description
PCM Audio
Data for
Center/
LFESurround
Comment
19:0
Set unused bits to "0"
SDATA_OUT Slots 5, 10–12: Reserved
Set these SDATA_OUT slots to "0" as they are not currently
implemented and are reserved for future use.
10097208
FIGURE 6. AC Link Audio Input Frame
L
www.national.com
17
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PDF描述 |
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| LM4550 | AC ’97 Rev 2.1 Multi-Channel Audio Codec with Stereo Headphone Amplifier, Sample Rate Conversion and National 3D Sound |
| LM4809LD | Dual 105mW Headphone Amplifier with Active-Low Shutdown Mode |
| LM4809 | Dual 105mW Headphone Amplifier with Active-Low Shutdown Mode |
| LM4809MA | Dual 105mW Headphone Amplifier with Active-Low Shutdown Mode |
| LM4809MM | Dual 105mW Headphone Amplifier with Active-Low Shutdown Mode |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM4550VH WAF | 制造商:Texas Instruments 功能描述: |
| LM4550VH/NOPB | 功能描述:IC AC '97 CODEC 48-LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編解碼器 系列:- 標(biāo)準(zhǔn)包裝:2,500 系列:- 類型:立體聲音頻 數(shù)據(jù)接口:串行 分辨率（位）:18 b ADC / DAC 數(shù)量:2 / 2 三角積分調(diào)變:是 S/N 比，標(biāo)準(zhǔn) ADC / DAC (db):81.5 / 88 動態(tài)范圍，標(biāo)準(zhǔn) ADC / DAC (db):82 / 87.5 電壓 - 電源，模擬:2.6 V ~ 3.3 V 電壓 - 電源，數(shù)字:1.7 V ~ 3.3 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:48-TQFN-EP（7x7） 包裝:帶卷 (TR) |
| LM4550VHX | 制造商:Rochester Electronics LLC 功能描述:AC '97 REV 2.1 CODEC - Bulk |
| LM4550VHX/NOPB | 制造商:Texas Instruments 功能描述:Audio Codec 2ADC / 2DAC 18-Bit 48-Pin LQFP T/R |
| LM4558 | 制造商:HTC 制造商全稱:HTC Korea TAEJIN Technology Co. 功能描述:DUAL OPERATIONAL AMPLIFIERS |
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