參數(shù)資料
型號: LM4549VH
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 消費家電
英文描述: CAPACITOR, CLASS Y2 100NFCAPACITOR, CLASS Y2 100NF; Capacitance:100nF; Voltage rating, AC:250V; Voltage rating, DC:2500V; Capacitor dielectric type:Polypropylene; Series:B81122; Tolerance, +:20%; Tolerance, -:20%; Temp, op.
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: 7 X 7 MM, 1.40 MM HEIGHT, TQFP-48
文件頁數(shù): 14/18頁
文件大?。?/td> 324K
代理商: LM4549VH
Application Information
(Continued)
Bit
Description
Codec Ready
Bit
Slot 1 data
valid
Slot 2 data
valid
Slot 3 data
valid
Slot 4 data
valid
Comment
15
0=Not Ready, 1=Ready
14
Status Address is valid
13
Status Data is valid
12
Left Audio PCM Data is
valid
Right Audio PCM Data is
valid
11
SDATA_IN Slot 1: Status Address / Slot Request Bits
This slot echoes the control register which a read was re-
quested on. The address echoed was initiated by a read re-
quest in the previous SDATA_OUT frame, slot 1. Bits 11 and
10 are slot request bits that support Sample Rate Conver-
sion (SRC) functionality. If bit 11 is set to 0, then the control-
ler should respond with a valid PCM left sample in slot 3 of
the next frame. If bit 10 is set to 0, then the controller should
respond with a valid PCM right sample in slot 4 of the next
frame. If bits 11 or 10 are set to 1, the controller should not
send data in the next frame. Bits 9 through 2 are unused.
Bits 1 and 0 are reserved and should be set to 0.
Bits
19
Description
Reserved
Comment
Stuffed with
0
Echo of Control Register
for which data is being
returned.
0 = Controller should
send valid slot 3 data in
the next frame, 1 =
Controller should not
send slot 3 data in the
next frame
0 = Controller should
send valid slot 4 data in
the next frame, 1 =
Controller should not
send slot 4 data in the
next frame
18:12
Control
Register Index
11
Slot 3
Request bit
(PCM left)
10
Slot 4
Request bit
(PCM right)
Bits
Description
Other Slot
Request bits
Reserved
Comment
9:2
Unused - stuff with
0
1,0
Stuff with
0
SDATA_IN Slot 2: Status Data
The slot returns the control register data. The data returned
was initiated by a read request in the previous SDATA_OUT
frame, slot 1.
Bits
Description
Control
Register Read
Data
Reserved
Comment
19:4
3:0
Stuffed with
0
’s
SDATA_IN Slot 3: PCM Record Left Channel
This slot contains the left ADC sample data. The signal to be
digitized is selected via register 1Ah and subsequently
routed through the Input Mux for recording by the left ADC.
This is a 20-bit slot, where the digitized 18-bit PCM data is
output from the codec MSB first and the last remaining 2 bits
will zeros.
Bits
Description
PCM Record
Left Channel
data
Reserved
Comment
19:2
18 bit audio sample from
left ADC
1:0
Stuffed with
0
’s
SDATA_IN Slot 4: PCM Record Right Channel
This slot contains the rightADC sample data. The signal digi-
tized is selected via register 1Ah and subsequently routed
through the Input Mux for recording by the right ADC. This is
a 20-bit slot, where the digitized 18-bit PCM data is output
from the codec MSB first and the last remaining 2 bits will ze-
ros.
Bits
Description
PCM Record
Right Channel
data
Reserved
Comment
19:2
18 bit audio sample from
right ADC
1:0
Stuffed with
0
’s
SDATA_IN Slots 5-12: Reserved
These SDATA_IN slots are set to
0
as they are reserved for
future use.
AC Link Low Power Mode
DS101035-7
FIGURE 7. Start of Audio Input Frame
DS101035-9
FIGURE 8. AC Link Powerdown Timing
www.national.com
14
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參數(shù)描述
LM4549VHX 制造商:Texas Instruments 功能描述:
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LM4550BVH 功能描述:接口—CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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