參數(shù)資料
型號(hào): LM4050AEM3-2.1-T
廠商: MAXIM INTEGRATED PRODUCTS INC
元件分類: 基準(zhǔn)電壓源/電流源
英文描述: 50ppm/∑C Precision Micropower Shunt Voltage References with Multiple Reverse Breakdown Voltages
中文描述: 1-OUTPUT TWO TERM VOLTAGE REFERENCE, 2.048 V, PDSO3
封裝: SOT-23, 3 PIN
文件頁(yè)數(shù): 11/14頁(yè)
文件大?。?/td> 299K
代理商: LM4050AEM3-2.1-T
L
50ppm/°C Precision Micropower Shunt Voltage
References with Multiple Reverse Breakdown Voltages
______________________________________________________________________________________
11
Detailed Description
The LM4050/LM4051 shunt references use the
bandgap principle to produce a stable, accurate volt-
age. The device behaves similarly to an ideal zener
diode; a fixed voltage is maintained across its output
terminals when biased with 60μA to 15mA of reverse
current. The LM4050/LM4051 clamps to a voltage of
one diode drop below ground when biased with for-
ward currents up 10mA.
Figure 3 shows a typical operating circuit. The
LM4050/LM4051 are ideal for providing stable refer-
ences from a high-voltage power supply.
Applications Information
The LM4050/LM4051s’ internal pass transistors are used
to maintain a constant output voltage (V
SHUNT
) by sinking
the necessary amount of current across a source resistor.
The source resistance (R
S
) is determined from the load
current (I
LOAD
) range, supply voltage (V
S
) variations,
V
SHUNT
, and desired quiescent current.
Choose the value of R
S
when V
S
is at a minimum and I
LOAD
is at a maximum. Maintain a minimum I
SHUNT
of 60μA at all
times. The R
S
value should be large enough to keep
I
SHUNT
less than 15mA for proper regulation when V
S
is
maximum and I
LOAD
is at a minimum. To prevent damage
to the device, I
SHUNT
should never exceed 20mA.
Therefore, the value of R
S
is bounded by the following
equation:
[V
S(MIN)
- V
R
] / [60μA + I
LOAD(MAX)
] > R
S
>
[V
S(MAX)
- V
R
] / [20mA + I
LOAD(MIN)
]
Choosing a larger resistance minimizes the total power dis-
sipation in the circuit by reducing the shunt current
(P
D(TOTAL)
= V
S
I
SHUNT
). Provide a safety margin to
incorporate the worst-case tolerance of the resistor used.
Ensure that the resistor’s power rating is adequate, using
the following general power equation:
PD
R
= I
SHUNT
(V
S(MAX)
- V
SHUNT
)
Output Capacitance
The LM4050/LM4051 do not require external capacitors
for frequency stability and are stable for any output
capacitance.
Temperature Performance
The LM4050/LM4051 typically exhibit output voltage
temperature coefficients within ±15ppm/°C. The polari-
ty of the temperature coefficients may be different from
one device to another; some may have positive coeffi-
cients, and others may have negative coefficients.
High Temperature Operation
The maximum junction temperature of the LM4050/
LM4051 is +150°C. The maximum operating temperature
for the LM4050/LM4051_E_ is +125°C. At a maximum
load current of 15mA and a maximum output voltage of
5V, the parts dissipate 75mW of power. The power dissi-
pation limits of the 3-pin SC70 call for a derating value of
2.17mW/°C above +70°C and thus for 75mW of power
dissipation, the parts self-heat to 35.56°C above ambient
temperature. If the ambient temperature is +125°C, the
parts operate at 159.56°C, thereby exceeding the maxi-
mum junction temperature value of +150°C. For high-
temperature operation, care must be taken to ensure the
combination of ambient temperature, output power dissi-
pation, and package thermal resistance does not con-
spire to raise the device temperature beyond that listed
in the
Absolute Maximum Ratings
. Either reduce the out-
put load current or the ambient temperature to keep the
part within the limits.
Figure 3. Typical Operating Circuit
LM4050/LM4051
I
LOAD
I
SHUNT
R
S
V
S
V
R
I
SHUNT
+ I
LOAD
Pin Description
PIN
NAME
FUNCTION
1
+
Positive Terminal of the Shunt Reference
2
Negative Terminal of the Shunt Reference
3
N.C.
No connection. Leave this pin unconnected or connected to pin 2.
Chip Information
TRANSISTOR COUNT: 60
PROCESS: BiCMOS
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