參數(shù)資料
型號: LM4031AC
廠商: National Semiconductor Corporation
元件分類: 串行ADC
英文描述: Self-Calibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sample/Hold
中文描述: 自校準(zhǔn)12位帶符號串行I /辦公自動化/ D轉(zhuǎn)換器MUX和采樣/保持
文件頁數(shù): 29/41頁
文件大小: 1152K
代理商: LM4031AC
Application Hints
(Continued)
1.6 User Mode and Test Mode
An instruction may be issued to the ADC to put it into test
mode. Test mode is used by the manufacturer to verify
complete functionality of the device. During test mode
CH0–CH7 become active outputs. If the device is inadvert-
ently put into the test mode with CS continuously low, the
serial communications may be desynchronized. Synchroni-
zation may be regained by cycling the power supply voltage
to the device. Cycling the power supply voltage will also set
the device into user mode. If CS is used in the serial inter-
face, the ADC may be queried to see what mode it is in. This
is done by issuing a “read STATUS register” instruction to the
ADC. When bit 9 of the status register is high, the ADC is in
test mode; when bit 9 is low the ADC, is in user mode. As an
alternative to cycling the power supply, an instruction se-
quence may be used to return the device to user mode. This
instruction sequence must be issued to the ADC using CS.
The following table lists the instructions required to return the
device to user mode:
Instruction
DI Data
DI0 DI1 DI2 DI3 DI4 DI5 DI6 DI7
H
X
X
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
or
L
L
L
L
H
H
or
or
L
L
L
L
H
H
H
H
or
or
or
or
L
L
L
L
TEST MODE
Reset
Test Mode
Instructions
H
H
H
H
H
H
H
H
L
L
H
L
H
H
H
H
H
H
H
L
L
H
H
L
USER MODE
Power Up
Set DO with
or without
Sign
Set
Acquisition
Time
Start
a
Conversion
X = Don’t Care
After returning to user mode with the user mode instruction
the power up, data with or without sign, and acquisition time
instructions need to be resent to ensure that the ADC is in
the required state before a conversion is started.
H
H
L
H
H
H
H
L
H
or
L
H
or
L
H
or
L
L
1.7 Reading the Data Without Starting a Conversion
The data from a particular conversion may be accessed
without starting a new conversion by ensuring that the
CONV line is taken high during the I/O sequence. See the
Read Data timing diagrams.
Table 6
describes the operation
of the CONV pin.
2.0 DESCRIPTION OF THE ANALOG MULTIPLEXER
For the ADC12038, the analog input multiplexer can be
configured with 4 differential channels or 8 single ended
channels with the COM input as the zero reference or any
combination thereof (see
Figure 9
). The difference between
the voltages on the V
REF+
and V
REF
pins determines the
input voltage span (V
). The analog input voltage range is
0 to V
A+
. Negative digital output codes result when V
IN
>
V
IN+
. The actual voltage at V
IN
or V
IN+
cannot go below
AGND.
01135437
FIGURE 8. Changing the ADC’s Conversion Configuration
4 Differential
Channels
01135438
8 Single-Ended Channels
with COM
as Zero Reference
01135439
FIGURE 9.
A
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29
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