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參數(shù)資料
| 型號(hào)： | LM3880 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Power Sequencer |
| 中文描述： | 電力序 |
| 文件頁(yè)數(shù)： | 8/12頁(yè) |
| 文件大小： | 619K |
| 代理商： | LM3880 |
Timing Diagrams (Sequence 1)
(Continued)
20192614
Power Down Sequence
Application Information
OVERVIEW
The LM3880 Power Sequencer provides an easy solution for
sequencing multiple rails in a controlled manner. Six inde-
pendent timers are integrated to control the timing sequence
(power up and power down) of three open drain output flags.
These flags permit connection to either a shutdown / enable
pin of linear regulators and switchers to control the power
supplies’ operation. This allows a complete power system to
be designed without worrying about large in-rush currents or
latch-up conditions that can occur.
The timing sequence of the LM3880 is controlled entirely by
the enable (EN) pin. Upon power up, all the flags are held
low until this precision enable is pulled high. After the EN pin
is asserted, the power up sequence will commence. An
internal counter will delay the first flag (FLAG1) from rising
until a fixed time period has expired. Upon the release of the
first flag another timer will begin to delay the release of the
second flag (FLAG2). This process repeats until all three
flags have sequentially been released. The three timers that
control the delays are all independent of each other and can
be individually programmed if needed. (See custom se-
quencer section).
The power down sequence is the same as power-up, but in
reverse. When EN pin is de-asserted a timer will begin that
delays the third flag (FLAG3) from pulling low. The second
and first flag will then follow in a sequential manner after their
appropriate delays. The three timers that are used to control
the power down scheme can also be individually pro-
grammed and are completely independent of the power up
timers.
Additional sequence patterns are also available in addition to
customizable timers. For more information see the custom
sequencer section.
PART OPERATION
The timing sequence of the LM3880 is controlled by the
assertion of the enable signal. The enable pin is designed
with an internal comparator, referenced to a bandgap volt-
age (1.15V), to provide a precision threshold. This allows a
delayed timing to be externally set using a capacitor or to
start the sequencing based on a certain event, such as a line
voltage reaching 90% of nominal. For an additional delayed
sequence from the rail powering VCC, simply attach a ca-
pacitor to the EN pin as shown below.
20192615
Cap Timing
Using the internal pull-up current source to charge the ex-
ternal capacitor (C
) the enable pin delay can be calculated
by the equation below:
A resistor divider can also be used to enable the LM3880
based on a certain voltage threshold. Care needs to be
taken when sizing the resistor divider to include the effects of
the internal current source.
One of the features of the enable pin is that it provides glitch
free operation. The first timer will start counting at a rising
threshold, but will always reset if the enable pin is de-
asserted before the first output flag is released. This can be
shown in the timing diagram below:
L
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PDF描述 |
|---|---|
| LM3880MF-1 | Power Sequencer |
| LM3880MFX-1 | Power Sequencer |
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| LM3886T | LM3886 Overture⑩ Audio Power Amplifier Series High-Performance 68W Audio Power Amplifier w/Mute |
| LM3886TF | LM3886 Overture⑩ Audio Power Amplifier Series High-Performance 68W Audio Power Amplifier w/Mute |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM3880_07 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Sequencer |
| LM3880_08 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Sequencer |
| LM3880EVAL | 功能描述:電源管理IC開發(fā)工具 EVAL BOARD RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| LM3880MF-1 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Power Sequencer |
| LM3880MF-1AA | 功能描述:監(jiān)控電路 RoHS:否 制造商:STMicroelectronics 監(jiān)測(cè)電壓數(shù): 監(jiān)測(cè)電壓: 欠電壓閾值: 過(guò)電壓閾值: 輸出類型:Active Low, Open Drain 人工復(fù)位:Resettable 監(jiān)視器:No Watchdog 電池備用開關(guān):No Backup 上電復(fù)位延遲（典型值）:10 s 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:UDFN-6 封裝:Reel |
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