
Product Operation
The current is sampled by the delta-sigma modulator, as il-
lustrated in Figure 6 The pulse density output of the
delta-sigma modulator is digitally filtered. The digital output
is then compared to the output of a digital ramp generator.
This produces a PWM output. The duty cycle of the PWM
output is proportional to the amount of current flowing.Aduty
cycle of 50% indicates zero current flow. If the current is flow-
ing in positive direction, the duty cycle will be greater than
50%. Conversely, the duty cycle will be less than 50% for
currents flowing in the negative direction. A duty cycle of
95.5% (4.5%) indicates the current is at I
(I
). The IC
can sense currents from I
to +I
. Options for I
MAX
are
1A or 10A. The sense current is given by:
I
SENSE
= 2.2 (D0.5)(I
MAX
)
where D is the duty cycle of the PWM waveform, and I
is
the full scale current (1A or 10A). Similarly, the duty cycle is
given by:
D = [I
SENSE
/(2.2 I
MAX
)] + 0.5
For quick reference, see the Conversion Tables in Table 1
and Table 2
The user should note that, while the LM3814-7.0/
LM3815-7.0 will read 10A full scale, it is rated for 10A op-
eration for a duration of no more than 200 msec, and 7A
operation continuously.
In this IC, the current is averaged over 6 msec time slots.
Hence, momentary current surges of less than 6 msec are
tolerated.
This
is
a
sampled
data
anti-aliasing filter, provided by the filter capacitor.
The delta-sigma modulator converts the sensed current to
the digital domain. This allows digital filtering, and provides
immunity to current and noise spikes. This type of filtering
would be difficult or impossible to accomplish on an IC with
analog components.
When ordering, the user has to specify whether the part is
being used for low-side or high-side sense. The user also
needs to specify the full scale value. See the Ordering Infor-
mation table for details.
system
which
requires
an
DS101013-10
FIGURE 6. Functional block diagram of LM3814 and LM3815
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