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參數(shù)資料
| 型號： | LM3743MM-1000 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | N-Channel FET Synchronous Buck Controller for Low Output Voltages |
| 中文描述： | SWITCHING CONTROLLER, 1150 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | PLASTIC, MSOP-10 |
| 文件頁數(shù)： | 21/23頁 |
| 文件大?。?/td> | 1145K |
| 代理商： | LM3743MM-1000 |
Application Information
(Continued)
The Output Power (P
) for the Typical Application Circuit
design is (1.8V x 10A) = 18W. The Total Power (P
), with
an efficiency calculation to complement the design, is shown
below.
The majority of the power losses are due to the low side and
high side MOSFET’s losses. The losses in any MOSFET are
switching (P
SW
), conduction losses (P
CND
), and gate charg-
ing losses (P
GATE
)
FET Switching Loss (P
SW
)
P
SW
= P
SW(ON)
+ P
SW(OFF)
P
SW
= 0.5 x V
IN
x I
OUT
x (t
r
+ t
f
) x f
SW
P
SW
= 0.5 x 5V x 10A x 300 kHz x 67 ns
P
SW
= 503 mW
The Si4866DY has a typical turn-on rise time t
and turn-off
fall time t
of 32 ns and 35 ns, respectively. The switching
losses for the upper FET (Q1) is 0.503W. The low side FET
(Q2) does not incur switching losses.
FET Conduction Loss (P
CND
)
P
CND
= P
CND1
+ P
CND2
P
CND1
= I
2OUT
x R
DS(ON)
x k x D
P
CND2
= I
2OUT
x R
DS(ON)
x k x (1-D)
R
= 4.5 m
and the k factor accounts for the increase
in R
DS(ON)
due to heating. k = 1.3 at T
J
= 100C
P
CND1
= (10A)
2
x 4.5 m
x 1.3 x 0.36
P
CND2
= (10A)
2
x 4.5 m
x 1.3 x (1 - 0.36)
P
CND
= P
CND1
+ P
CND2
P
CND
= 211 mW + 374 mW = 585 mW
FET Gate Charging Loss (P
GATE
)
P
GATE_H
= n x ( V
CC
- V
D1
) x Q
GS
x f
SW
P
GATE_L
= n x V
CC
x Q
GS
x f
SW
P
GATES
= [ 1 x ( 5.0V - 0.4V ) x 22 nC x 300 kHz ] + [ 1 x
( 5.0V ) x 22 nC x 300 kHz ]
P
GATES
= 29 mW + 33 mW = 62 mW
The value n is the total number of FETs used and Q
GS
is the
typical gate-source charge value, which is 21 nC. For the
Si4866DY the gate charging loss is 62 mW.
Thus the total MOSFET losses are:
P
FET
= P
SW
+ P
CND
+ P
GATES
=
503 mW + 585 mW + 62 mW
P
FET
= 1.15 W
There are few additional losses that are taken into account:
IC Loss (P
IC
)
P
OP
= I
Q_VCC
x V
CC
P
DR
= [[ (n x Q
GS
x f
SW
) / D] +[ (n x Q
GS
x f
SW
) / (1–D) ]]
x V
CC
where P
is the operating loss, P
is the driver loss,
I
Q-VCC
is the typical operating V
CC
current
P
OP
= ( 1.3 mA x 5.0V )
P
DR
= [( 1 x 22 nC x 300 kHz ) / .36 ] + [( 1 x 22 nC x 300
kHz ) / .64 ] x V
CC
P
IC
= P
OP
+ P
DR
P
IC
= 6.5 mW + 137 mW = 143.5 mW
Input Capacitor Loss (P
CAP
)
where,
Here n is the number of paralleled capacitors, ESR is the
equivalent series resistance of each, and P
is the dissi-
pation in each. So for example if we use only one input
capacitor of 10m
.
P
CAP
= 230 mW
Output Inductor Loss (P
IND
)
P
IND
= I
2OUT
x DCR
where DCR is the DC resistance. Therefore, for example
P
IND
= (10A)
2
x 3 m
P
IND
= 302 mW
Total System Efficiency
P
LOSS
= P
FET
+ P
IC
+ P
CAP
+ P
IND
PCB LAYOUT CONSIDERATIONS
To produce an optimal power solution with the LM3743, good
layout and design of the PCB are as important as component
selection. The following are several guidelines to aid in
creating a good layout. For an extensive PCB layout expla-
nation refer to AN-1229.
Separate Power Ground and Signal Ground
Good layout techniques include a dedicated ground plane,
preferably on an internal layer. Signal level components like
the compensation and feedback resistors should be con-
nected to a section of this internal plane, signal ground. The
signal ground section of the plane should be connected to
the power ground at a single point. The best place to connect
the signal ground and power ground is right at the GND pin
of the IC.
Low Impedance Power Path
The power path includes the input capacitors, power FETs,
output inductor, and output capacitors. Keep these compo-
nents on the same side of the PCB and connect them with
thick traces or copper planes on the same layer. Vias add
resistance and inductance to the power path, and have high
impedance connections to internal planes than do top or
bottom layers of a PCB. If heavy switching currents must be
routed through vias and/or internal planes, use multiple vias
in parallel to reduce their resistance and inductance. The
L
www.national.com
21
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM3743MM-1000/NOPB | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM3743MM-300 | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM3743MM-300/NOPB | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM3743MMX-1000 | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM3743MMX-1000/NOPB | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
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