參數(shù)資料
型號(hào): LM3702
廠商: National Semiconductor Corporation
英文描述: Microprocessor Supervisory Circuits with Low Line Output and Manual Reset
中文描述: 微處理器監(jiān)控電路低線路輸出和手動(dòng)復(fù)位
文件頁數(shù): 9/13頁
文件大?。?/td> 222K
代理商: LM3702
Circuit Information
RESET OUTPUT
The Reset input of a μP initializes the device into a known
state. The LM3702/LM3703 microprocessor supervisory cir-
cuits assert a forced reset output to prevent code execution
errors during power-up, power-down, and brownout condi-
tions.
RESET is guaranteed valid for V
CC
>
1V. Once V
CC
ex-
ceeds the reset threshold, an internal timer maintains the
output for the reset timeout period. After this interval, reset
goes high. The LM3702 offers an active-low RESET; The
LM3703 offers an active-high RESET.
Any time V
CC
drops below the reset threshold (such as
during a brownout), the reset activates. When V
again
rises above the reset threshold, the internal timer starts.
Reset holds until V
exceeds the reset threshold for longer
than the reset timeout period. After this time, reset releases.
The Manual Reset input (MR) will initiate a forced reset also.
See the
Manual Reset Input
section.
RESET THRESHOLD
The LM3702/LM3703 family is available with a reset voltage
of 3.08V. Other reset thresholds in the 2.20V to 5.0V range,
in steps of 10 mV, are available; contact National Semicon-
ductor for details.
MANUAL RESET INPUT (MR)
Many μP-based products require a manual reset capability,
allowing the operator to initiate a reset. The MR input is fully
debounced and provides an internal 56 k
pull-up. When the
MR input is pulled below V
MRT
(1.225V) for more than 25 μs,
reset is asserted after a typical delay of 12 μs. Reset remains
active as long as MR is held low, and releases after the reset
timeout period expires after MR rises above V
. Use MR
with digital logic to assert or to daisy chain supervisory
circuits. It may be used as another low-line comparator by
adding a buffer.
LOW-LINE OUTPUT (LLO)
The low-line output comparator is typically used to provide a
non-maskable interrupt to a μP when V
CC
begins falling. LLO
monitors V
CC
and goes low when V
CC
falls below V
LLOT
(typically 1.02
V
RST
) with hysteresis of 0.0032
V
RST
.
SPECIAL PRECAUTIONS FOR THE MICRO SMD
PACKAGE
As with most integrated circuits, the LM3702 and LM3703
are sensitive to exposure from visible and infrared (IR) light
radiation. Unlike a plastic encapsulated IC, the micro SMD
package has very limited shielding from light, and some
sensitivity to light reflected from the surface of the PC board
or long wavelength IR entering the die from the side may be
experienced. This light could have an unpredictable affect on
the electrical performance of the IC. Care should be taken to
shield the device from direct exposure to bright visible or IR
light during operation.
MICRO SMD MOUNTING
The micro SMD package requires specific mounting tech-
niques which are detailed in National Semiconductor Appli-
cation Note AN-1112. Referring to the section
Surface
Mount Technology (SMT) Assembly Considerations
, it
should be noted that the pad style which must be used with
the 9-pin package is the NSMD (non-solder mask defined)
type.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
L
www.national.com
9
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