
LOW OUTPUT RIPPLE CONFIGURATIONS
For applications where lower ripple at V
OUT is required, the
following options can be used to reduce or nearly eliminate
the ripple.
a) Reduced ripple configuration:
In Figure 8, Cff is added
across R1 to AC-couple the ripple at V
OUT directly to the FB
pin. This allows the ripple at V
OUT to be reduced to a minimum
of 25 mVp-p by reducing R3, since the ripple at V
OUT is not
attenuated by the feedback resistors. The minimum value for
Cff is determined from:
where t
ON(max) is the maximum on-time, which occurs at VIN
(min). The next larger standard value capacitor should be used
for Cff. R1 and R2 should each be towards the upper end of
the 2 k
to 10 k range.
30102725
FIGURE 8. Reduced Ripple Configuration
b) Minimum ripple configuration:
The circuit of Figure 9
provides minimum ripple at V
OUT, determined primarily by
C2’s characteristics and the inductor’s ripple current since R3
is removed. RA and CA are chosen to generate a sawtooth
waveform at their junction, and that voltage is AC-coupled to
the FB pin via CB. To determine the values for RA, CA and
CB, use the following procedure:
Calculate V
A = VOUT - (VSW x (1 - (VOUT/VIN(min))))
where V
SW is the absolute value of the voltage at the SW pin
during the off-time (typically 1V). V
A is the DC voltage at the
RA/CA junction, and is used in the next equation.
where t
ON is the maximum on-time (at minimum input volt-
age), and
ΔV is the desired ripple amplitude at the RA/CA
junction, typically 50 mV. RA and CA are then chosen from
standard value components to satisfy the above product. Typ-
ically CA is 3000 pF to 5000 pF, and RA is 10 k
to 300 k.
CB is then chosen large compared to CA, typically 0.1 F. R1
and R2 should each be towards the upper end of the 2 k
to
10 k
range.
30102727
FIGURE 9. Minimum Output Ripple Using Ripple Injection
c) Alternate minimum ripple configuration:
The circuit in
Figure 10 is the same as that in Figure 5, except the output
voltage is taken from the junction of R3 and C2. The ripple at
V
OUT is determined by the inductor’s ripple current and C2’s
characteristics. However, R3 slightly degrades the load reg-
ulation. This circuit may be suitable if the load current is fairly
constant.
30102728
FIGURE 10. Alternate Minimum Output Ripple
Configuration
Minimum Load Current
The LM34919B requires a minimum load current of 1 mA. If
the load current falls below that level, the bootstrap capacitor
(C4) may discharge during the long off-time, and the circuit
will either shutdown, or cycle on and off at a low frequency. If
the load current is expected to drop below 1 mA in the appli-
cation, R1 and R2 should be chosen low enough in value so
they provide the minimum required current at nominal V
OUT.
PC BOARD LAYOUT
Refer to application note AN-1112 for PC board guidelines for
the Micro SMD package.
The LM34919B regulation, over-voltage, and current limit
comparators are very fast, and respond to short duration
noise pulses. Layout considerations are therefore critical for
optimum performance. The layout must be as neat and com-
pact as possible, and all of the components must be as close
as possible to their associated pins. The two major current
loops have currents which switch very fast, and so the loops
should be as small as possible to minimize conducted and
radiated EMI. The first loop is that formed by C1, through the
VIN to SW pins, L1, C2, and back to C1.The second current
loop is formed by D1, L1, C2 and the SGND and ISEN pins.
The power dissipation within the LM34919B can be approxi-
mated by determining the total conversion loss (P
IN - POUT),
and then subtracting the power losses in the free-wheeling
diode and the inductor. The power loss in the diode is ap-
proximately:
17
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LM34919B