參數(shù)資料
型號： LM3370TLX-3022
廠商： National Semiconductor Corporation
元件分類： DC/DC變換器
英文描述： Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function
中文描述： 雙同步降壓型DC - DC轉(zhuǎn)換器的動態(tài)電壓調(diào)節(jié)功能
文件頁數(shù)： 16/26頁
文件大小： 5302K
代理商： LM3370TLX-3022
I
2
C Compatible Interface Electrical Specifications
Unless otherwise noted, V
BATT
= 2.7V to 5.5V. Typical values and limits appearing in normal type apply for T
J
= 25°C. Limits
appearing in
boldface
type apply over the entire junction temperature range for operation, 30°C to +125°C. (Notes 2, 8, 9)
Symbol
Parameter
F
CLK
Clock Frequency
t
BF
Bus-Free Time between Start and Stop
t
HOLD
Hold Time Repeated Start Condition
t
CLKLP
CLK Low Period
t
CLKHP
CLK High Period
t
SU
Set Up Time Repeated Start Condition
t
DATAHLD
Data Hold Time
t
CLKSU
Data Set Up Time
T
SU
Set Up Time for Start Condition
T
TRANS
Maximum Pulse Width of Spikes that Must be
Suppressed by the Input Filter of Both DATA & CLK
signals.
VDD_I
2
C
I
2
C Logic High Level
Conditions
Min
1.3
0.6
1.3
0.6
0.6
200
200
0.6
Typ
Max
400
Units
kHz
(Note 10)
μS
(Note 10)
μS
(Note 10)
μS
(Note 10)
μS
(Note 10)
μS
(Note 10)
nS
(Note 10)
nS
(Note 10)
μS
(Note 10)
50
nS
1
V
IN
V
I
2
C Compatible Interface
In I
2
C compatible mode, the SCL pin is used for the I
2
C clock
and the SDA pin is used for the I
2
C data. Both these signals
need a pull-up resistor according to I
2
C specification. The
values of the pull-up resistor are determined by the capaci-
tance of the bus (typ.
～
1.8k). Signal timing specifications are
according to the I
2
C bus specification. Maximum frequency is
400 kHz.
I
2
C COMPATIBLE DATA VALIDITY
The data on SDA line must be stable during the HIGH period
of the clock signal (SCL). In other words, state of the data line
can only be changed when CLK is LOW.
I
2
C COMPATIBLE START AND STOP CONDITIONS
START and STOP bits classify the beginning and the end of
the I
2
C session. START condition is defined as SDA signal
transitioning from HIGH to LOW while SCL line is HIGH.
STOP condition is defined as the SDA transitioning from LOW
to HIGH while SCL is HIGH. The I
2
C master always generates
START and STOP bits. The I
2
C bus is considered to be busy
after START condition and free after STOP condition. During
data transmission, I
2
C master can generate repeated START
conditions. First START and repeated START conditions are
equivalent, function-wise.
20167307
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM3370TLX-3022/NOPB 功能描述:DC/DC 開關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
LM3370TLX-3206 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function
LM3370TLX-3206/NOPB 功能描述:DC/DC 開關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
LM3370TLX-3607 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Dual Synchronous Step-Down DC-DC Converter with Dynamic Voltage Scaling Function
LM3370TLX-3607/NOPB 功能描述:DC/DC 開關(guān)控制器 RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK
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