
C
IN
and C
IN3
:
The function of C
is to supply most of the main
MOSFET current during the on-time, and limit the voltage rip-
ple at the VIN pin, assuming that the voltage source connect-
ing to the VIN pin has finite output impedance. If the voltage
source’s dynamic impedance is high (effectively a current
source), C
supplies the average input current, but not the
ripple current.
At the maximum load current, when the main MOSFET turns
on, the current to the VIN pin suddenly increases from zero
to the lower peak of the inductor’s ripple current and ramps
up to the higher peak value. It then drops to zero at turn-off.
The average current during the on-time is the load current.
For a worst case calculation, C
must be capable of supplying
this average load current during the maximum on-time. C
IN
is
calculated from:
(10)
where I
OUT
is the load current, t
on
is the maximum on-time,
and
Δ
V
IN
IN
.
C
’s purpose is to help avoid transients and ringing due to
long lead inductance at the VIN pin. A low ESR 0.1 μF ceramic
chip capacitor located close to the LM3102 is recommended.
C
:
A 33 nF high quality ceramic capacitor with low ESR is
recommended for C
since it supplies a surge current to
charge the main MOSFET gate driver at turn-on. Low ESR
also helps ensure a complete recharge during each off-time.
C
:
The capacitor at the SS pin determines the soft-start
time, i.e. the time for the reference voltage at the regulation
comparator and the output voltage to reach their final value.
The time is determined from the following equation:
(11)
C
FB
:
If the output voltage is higher than 1.6V, C
is needed
in the Discontinuous Conduction Mode to reduce the output
ripple. The recommended value for C
FB
is 10 nF.
PC BOARD LAYOUT
The LM3102 regulation, over-voltage, and current limit com-
parators are very fast so they will respond to short duration
noise pulses. Layout is therefore critical for optimum perfor-
mance. It must be as neat and compact as possible, and all
external components must be as close to their associated
pins of the LM3102 as possible. Refer to the functional block
diagram, the loop formed by C
, the main and synchronous
MOSFET internal to the LM3102, and the PGND pin should
be as small as possible. The connection from the PGND pin
to C
should be as short and direct as possible. Vias should
be added to connect the ground of C
to a ground plane,
located as close to the capacitor as possible. The bootstrap
capacitor C
should be connected as close to the SW and
BST pins as possible, and the connecting traces should be
thick. The feedback resistors and capacitor R
, R
, and
C
FB
should be close to the FB pin. A long trace running from
V
to R
is generally acceptable since this is a low
impedance node. Ground R
FB2
directly to the AGND pin (pin
7). The output capacitor C
should be connected close to
the load and tied directly to the ground plane. The inductor L
should be connected close to the SW pin with as short a trace
as possible to reduce the potential for EMI (electromagnetic
interference) generation. If it is expected that the internal dis-
sipation of the LM3102 will produce excessive junction tem-
perature during normal operation, making good use of the PC
board’s ground plane can help considerably to dissipate heat.
The exposed pad on the bottom of the LM3102 IC package
can be soldered to the ground plane, which should extend out
from beneath the LM3102 to help dissipate heat. The exposed
pad is internally connected to the LM3102 IC substrate. Ad-
ditionally the use of thick traces, where possible, can help
conduct heat away from the LM3102. Using numerous vias to
connect the die attached pad to the ground plane is a good
practice. Judicious positioning of the PC board within the end
product, along with the use of any available air flow (forced or
natural convection) can help reduce the junction temperature.
30021335
Typical Application Schematic for V
OUT
= 3.3V
www.national.com
14
L