參數(shù)資料
型號(hào)： LM2893M
廠(chǎng)商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 通信及網(wǎng)絡(luò)
英文描述： LM1893/LM2893 Carrier-Current Transceiver
中文描述： SPECIALTY TELECOM CIRCUIT, PDSO20
封裝： 0.300 INCH, PLASTIC, SOP-20
文件頁(yè)數(shù)： 12/24頁(yè)
文件大小： 576K
代理商： LM2893M
Component Selection
(Continued)
C
F
and R
F
These phase-locked loop (PLL) loop filter components re-
move some of the noise and most of the 2F
O
components
present in the demodulated differential output voltage signal
from the phase detector. They affect the PLL capture range,
loop bandwidth, damping, and capture time. Because the
PLL has an inherent loop pole due to the integrator action of
the ICO (via C
O
), the loop pole set by C
F
and the zero set by
R
F
gives the loop filter a classical 2nd-order response.
TL/H/6750–18
FIGURE 16. The Norton-input limiter amplifier bandpass
filter line-frequency signal attenuation given C
L
TL/H/6750–19
FIGURE 17. Find C
F
given F
O
.Figure 19
gives the maximum data rate
No C
F
and R
F
give the most stable PLL with the fastest
response. Large C
F
’s with a too-small R
F
cause PLL loop
instability leading to poor capture range and poor step re-
sponse or oscillation.
Calculation of C
F
and R
F
is quite difficult, involving not only
the 2nd-order loop step response, but also the PLL non-
dominant poles, the tuned transformer stepped-frequency
response, and the RC lowpass step response (for data rates
approaching 1 kHz). C
F
and R
F
values are best found em-
pirically. Tolerance is not critical. Component values are se-
lected to give the best possible impulse noise rejection
while preserving a
g
20% capture range and wide stability
margin.Figures 17 and18 give C
F
and R
F
values versus F
O
,
where ‘‘f
DATA
kk
MAX DATA RATE’’ means that f
DATA
should be less than the maximum data rate, in kHz, from
Figure 19 divided by 10.
Note that C
F
and R
F
are a function of data rate only for high
data rates and are not plotted against data rate - as one
might expect. The reason for this is important to understand
if the CCT system designer wishes to find C
F
and R
F
empiri-
cally. Data signal is, loosely speaking, passed through the
PLL loop and is therefore potentially attenuated if the loop
bandwidth is on the order of the 3rd harmonic of the data
rate, or less. Overall loop bandwidth is held as low as possi-
ble for maximum noise rejection while passing the data.
Loop bandwidth is roughly proportional to the geometric
mean of the unfiltered loop bandwidth and the filter pole set
by C
F
. Therefore, C
F
is related to data rate. Unfortunately,
the loop capture range falls to critically low values when
large enough values of C
F
are used to reduce loop band-
width down to the 100’s of Hz range, for low data rates. The
obvious way out is to then reduce the unfiltered loop band-
width. That bandwidth is approximately proportional to the
value of C
O
. For a fixed F
O
, unfiltered loop bandwidth reduc-
tion requires a larger C
O
and larger control current. With this
chip, changing the control current is not allowed. So one is
forced to choose a C
F
/R
F
combination with some minimum
capture range, say
g
20%, that is within some guardband
from the point of loop instability. Happily, impulse noise
tends to last only fractions of a millisecond so that the lack
of low bandwidth loop response with low data rates is not a
heavy penalty. As long as there is adequate capture range,
the impulse noise filter performs admirably. Note that reduc-
ing F
O
will reduce the no-filter loop bandwidth, and indeed
the maximum data rate falls below the limit set by the RC
lowpass filter as F
O
falls below 100 kHz (Figure 19).
The tuned transformer characteristics will affect the demod-
ulated data waveform more than C
F
and R
F
at low data
rates. Tank Q and off-tuning will affect overshoot during the
FSK frequency steps. This is a property of tuned circuits.
The maximum data rate of Figure 19 is measured from the
receiver input to the Data Out and does not include the data
bandwidth reducing effects of T
I
.
C
M
Capacitor C
M
stores a voltage corresponding to a correction
factor required to cancel the phase detector differential out-
put DC offsets. The stored voltage is
±/6
of the DC offset
plus some bias level of about 2.2 V. A large C
M
value in-
creases the time required to bias-up the receive path at the
beginning of transmission. A large C
M
does filter well and
store its bias voltage long. Because of the initial random
charge of C
M
, the receiver must be given a data transition to
charge to the proper bias voltage. Therefore, reducing C
M
’s
value to one that may be charged in less than 2 bit-times will
not save biasing time and is not recommended.
TL/H/6750–20
FIGURE 18. Find R
F
given F
O
with F
DATA
a parameter
TL/H/6750–21
FIGURE 19. The maximum data rate versus F
O
using
loop filter components optimized for max. noise
performance while retaining a min.
g
20% capture
range (large signal)
Use Figure 20 to find C
M
’s value knowing f
DATA
, assuming
the standard 2 bit receive charge time is desired. The cap.
value and TC are not critical, but the capacitor should have
low leakage.
12
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