參數(shù)資料
型號(hào)： LM2578MWC
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類(lèi)： 穩(wěn)壓器
英文描述： 0.75 A SWITCHING REGULATOR, 100 kHz SWITCHING FREQ-MAX, UUC
封裝： WAFER
文件頁(yè)數(shù)： 18/24頁(yè)
文件大?。?/td> 1127K
代理商： LM2578MWC
Electrical Characteristics (Continued)
These specifications apply for 2V
≤ V
IN ≤ 40V (2.2V ≤ VIN ≤ 40V for TJ ≤ 25C), timing capacitor CT = 3900 pF, and 25% ≤
duty cycle
≤ 75%, unless otherwise specified. Values in standard typeface are for T
J = 25C; values in boldface type apply for
operation over the specified operating junction temperature range.
LM1578A
LM2578A/
Symbol
Parameter
Conditions
Typical
Limit
LM3578A
Units
(Note 5)
(Note 6)
(Note 11)
Limit
(Note 7)
CURRENT LIMIT
V
CL
Sense Voltage
Referred to V
IN or Ground
110
mV
Shutdown Level
(Note 10)
95
80
mV (min)
140
160
mV (max)
V
CL/T
Sense Voltage
0.3
%/C
Temperature Drift
I
CL
Sense Bias Current
Referred to V
IN
4.0
A
Referred to ground
0.4
A
DEVICE POWER CONSUMPTION
I
S
Supply Current
Output OFF, V
E = 0V
2.0
mA
3.0/3.3
3.5/4.0
mA (max)
Output ON, I
C = 750 mA pulsed,
14
mA
V
E = 0V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 2: For TJ ≥ 100C, the Emitter pin voltage should not be driven more than 0.6V below ground (see Application Information).
Note 3: At elevated temperatures, devices must be derated based on package thermal resistance. The device in the TO-99 package must be derated at 150C/W,
junction to ambient, or 45C/W, junction to case. The device in the 8-pin DIP must be derated at 95C/W, junction to ambient. The device in the surface-mount package
must be derated at 150C/W, junction-to-ambient.
Note 4: Human body model, 1.5 k
in series with 100 pF.
Note 5: Typical values are for TJ = 25C and represent the most likely parametric norm.
Note 6: All limits guaranteed and 100% production tested at room temperature (standard type face) and at temperature extremes (bold type face). All limits are used
to calculate Average Outgoing Quality Level (AOQL).
Note 7: All limits guaranteed at room temperature (standard type face) and at temperature extremes (bold type face). Room temperature limits are 100% production
tested. Limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods. All limits are used to calculate AOQL.
Note 8: Input terminals are protected from accidental shorts to ground but if external voltages higher than the reference voltage are applied, excessive current will
flow and should be limited to less than 5 mA.
Note 9: I1 and I2 are the external sink currents at the inputs (refer to Test Circuit).
Note 10: Connection of a 10 k
resistor from pin 1 to pin 4 will drive the duty cycle to its maximum, typically 90%. Applying the minimum Current Limit Sense Voltage
to pin 7 will not reduce the duty cycle to less than 50%. Applying the maximum Current Limit Sense Voltage to pin 7 is certain to reduce the duty cycle below 50%.
Increasing this voltage by 15 mV may be required to reduce the duty cycle to 0%, when the Collector output swing is 40V or greater (see Ground-Referred Current
Limit Sense Voltage typical curve).
Note 11: A military RETS specification is available on request. At the time of printing, the LM1578A RETS spec complied with the boldface limits in this column. The
LM1578AH may also be procured as a Standard Military Drawing.
3
www.national.com
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