
30115852
FIGURE 15. Adding Delay to the Power Good Output Pin
SYSTEM CONSIDERATIONS
A) Continued proper operation of the LM25066 hot-swap cir-
cuit normally dictates that capacitance be present on the
supply side of the connector into which the hot-swap circuit is
plugged in, as depicted in
Figure 16. The capacitor in the
“LIVE POWER SOURCE” section is necessary to absorb the
transient generated whenever the hot-swap circuit shuts off
the load current. If the capacitance is not present, parasitic
inductance of the supply lines will generate a voltage transient
at shut-off which may exceed the absolute maximum rating of
the LM25066, resulting in its destruction. A TVS device with
appropriate voltage and power ratings can also be connected
from VIN to GND to clamp the voltage spike (see application
note AN-2100).
B) If the load powered by the LM25066 hot-swap circuit has
inductive characteristics, a Schottky diode is required across
the LM25066’s output along with some load capacitance. The
capacitance and diode are necessary to limit the negative ex-
cursion at the OUT pin when the load current is shut off. If the
OUT pin transitions more than 0.3V negative, the LM25066
will internally reset, erasing the volatile setting for retries and
warning thresholds. See
Figure 16. To alleviate this, a small
gate resistance (e.g. 10
) can be used. This resistor has the
added benefit of damping any high frequency gate voltage
oscillations, particularly in paralleled FET arrangements.
30115854
FIGURE 16. Output Diode Required for Inductive Loads
PC BOARD GUIDELINES
The following guidelines should be followed when designing
the PC board for the LM25066:
- Place the LM25066 close to the board’s input connector to
minimize trace inductance from the connector to the MOS-
FET.
- Place a small capacitor, C
IN (1nF), directly adjacent to the
VIN and GND pins of the LM25066 to help minimize transients
which may occur on the input supply line. Transients of sev-
eral volts can easily occur when the load current is shut off.
ASIDE: note that if the current drawn by such capacitor is
deemed unacceptable, input voltage spike transients can be
appropriately miniminzed by proper placement of a TVS de-
vice and operation without this C
IN capacitor becomes feasi-
ble.
- Place a 1 F capacitor as close as possible to VREF pin.
- Place a 1 F capacitor as close as possible to VDD pin.
- The sense resistor (R
S) should be placed close to the
LM25066. In particular, the trace to the VIN pin should be
made as low resistance as practical to ensure maximum cur-
rent and power measurement accuracy. Connect R
S using the
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LM25066