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參數(shù)資料
| 型號(hào)： | LM24 |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | Monolithic Triple 9.5 ns CRT Driver |
| 中文描述： | 單片三CRT顯示器驅(qū)動(dòng)9.5納秒 |
| 文件頁(yè)數(shù)： | 2/9頁(yè) |
| 文件大?。?/td> | 1060K |
| 代理商： | LM24 |
Absolute Maximum Ratings
(Notes 1, 3)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltage, (V
CC
)
Bias Voltage, (V
BB
)
Input Voltage, (V
IN
)
Storage Temperature Range, (T
STG
)
Lead Temperature
(Soldering,
<
10 sec.)
ESD Tolerance, Human Body Model
+90V
+16V
0V to 6V
65C to +150C
300C
2 kV
Machine Model
250V
Operating Range
(Note 2)
V
CC
V
BB
V
IN
V
OUT
Case Temperature
Do not operate the part without a heat sink.
+60V to +85V
+8V to +15V
+0V to +5V
+15V to +75V
20C to +115C
Electrical Characteristics
(See Figure 2 for Test Circuit)
Unless otherwise noted: V
CC
= +80V, V
BB
= +12V, V
IN
= +2.7 V
DC
, C
L
= 8 pF, Output = 40 V
PP
at 1 MHz, T
C
= 50C.
Symbol
Parameter
Condition
LM2409
Typ
Units
Min
Max
I
CC
Supply Current
Per Channel, No Input Signal, No
Output Load
All Three Channels
No AC Input Signal, V
IN
= 1.2V
No AC Input Signal
(Note 4), No AC Input Signal
(Notes 4, 5), No AC Input Signal
(Note 6), 10% to 90%
(Note 6), 90% to 10%
(Note 6)
8
mA
I
BB
V
OUT
A
V
A
V
LE
t
R
t
F
OS
Bias Current
DC Output Voltage
DC Voltage Gain
Gain Matching
Linearity Error
Rise Time
Fall Time
Overshoot
12
65
14
1.0
8
9
11
1
mA
V
DC
62
12
68
16
dB
%
ns
ns
%
Note 1:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur.
Note 2:
Operating ratings indicate conditions for which the device is functional, but do not guarantee specific performance limits. For guaranteed specifications and
test conditions, see the Electrical Characteristics. The guaranteed specifications apply only for the test conditions listed. Some performance characteristics may
change when the device is not operated under the listed test conditions.
Note 3:
All voltages are measured with respect to GND, unless otherwise specified.
Note 4:
Calculated value from Voltage Gain test on each channel.
Note 5:
Linearity Error is the variation in dc gain from V
IN
= 1.0V to V
IN
= 4.5V.
Note 6:
Input from signal generator: t
r
, t
f
<
1 ns.
AC Test Circuit
Figure 2 shows a typical test circuit for evaluation of the LM2409. This circuit is designed to allow testing of the LM2409 in a 50
environment without the use of an expensive FET probe. The 4950
resistor at the output forms a 100:1 voltage divider when
connected to a 50
load.
DS100838-3
Note:
8 pF load includes parasitic capacitance.
FIGURE 2. Test Circuit (One Channel)
www.national.com
2
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