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參數(shù)資料
| 型號： | LM201AVDR2G |
| 廠商： | ON Semiconductor |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC OPAMP SGL NON-COMPENS 8-SOIC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 通用 |
| 電路數(shù)： | 1 |
| 轉(zhuǎn)換速率： | 0.5 V/µs |
| 增益帶寬積： | 1MHz |
| 電流 - 輸入偏壓： | 30nA |
| 電壓 - 輸入偏移： | 700µV |
| 電流 - 電源： | 1.8mA |
| 電壓 - 電源，單路/雙路(±)： | ±5 V ~ 22 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOICN |
| 包裝： | 剪切帶 (CT) |
| 其它名稱： | LM201AVDR2GOSCT |
Semiconductor Components Industries, LLC, 2011
December, 2011 Rev. 11
1
Publication Order Number:
LM301A/D
LM301A, LM201A, LM201AV
Non Compensated Single
Operational Amplifiers
A general purpose operational amplifier that allows the user to
choose the compensation capacitor best suited to his needs. With
proper compensation, summing amplifier slew rates to 10 V/
ms can be
obtained.
Features
Low Input Offset Current: 20 nA Maximum Over Temperature
Range
External Frequency Compensation for Flexibility
Class AB Output Provides Excellent Linearity
Output Short Circuit Protection
Guaranteed Drift Characteristics
PbFree Packages are Available
Figure 1. Standard Compensation
and Offset Balancing Circuit
Balance
VEE
VCC
Output
Inverting
Input
Balance
10 M
W
Freq
Compen
30 pF
VEE
20 k
+
Non-
Inverting
Input
5.1 M
W
VCC
VO
VUT
VI
VEE
VCC
VLT
VEE
MZ4622 or Equiv.
VO
VO = 4.8 V for
VLT ≤ VI ≤ VUT
VO = -0.4 V
VI < VLT or VI > VUT
(Pins Not Shown Are Not Connected)
+
3.9 V
Figure 2. DoubleEnded Limit Detector
PDIP8
N SUFFIX
CASE 626
1
8
SOIC8
D SUFFIX
CASE 751
Compensation
VCC
Output
Balance
VEE 4
Balance 1
2
3
8
7
6
5
Inputs
(Top View)
PIN CONNECTIONS
http://onsemi.com
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
ORDERING INFORMATION
MARKING
DIAGRAMS
x
= 2 or 3
A
= Assembly Location
WL, L
= Wafer Lot
YY, Y
= Year
WW, W = Work Week
G
= PbFree Package
G
= PbFree Package
1
8
LMx01AN
AWL
YYWWG
1
8
201AV
ALYW
G
1
8
LMx01
ALYWA
G
1
8
LM201AVDR2G
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