
Application Information
(Continued)
DAISY-CHAIN CAPABILITY
Since the μPot’s digital interface is essentially a shift register,
multiple μPots can be programmed utilizing the same data
and load/shift lines. As shown in Figure 11 for an n-μPot
daisy-chain, there are 16n bits to be shifted and loaded for
the chain. The data loading sequence is the same for
n-μPots as it is for one μPot. First the LOAD/SHIFT line goes
low, then the data is clocked in sequentially while the preced-
ing data in each μPot is shifted out the DATA-OUT pin to the
next μPot in the chain or to ground if it is the last μPot in the
chain. Then the LOAD/SHIFT line goes high; latching the
data into each of their corresponding μPots. The data is then
decoded according to the address (channel selection) and
the appropriate tap switch controlling the attenuation level is
selected.
CROSSTALK MEASUREMENTS
The crosstalk of a μPot as shown in the
Typical Perfor-
mance Characteristics
section was obtained by placing a
signal on one channel and measuring the level at the output
of another channel of the same frequency. It is important to
be sure that the signal level being measured is of the same
frequency such that a true indication of crosstalk may be ob-
tained. Also, to ensure an accurate measurement, the mea-
sured channel’s input should beAC grounded through a 1 μF
capacitor.
CLICKS AND POPS
So, why is that output buffer needed anyway There are
three answers to this question, all of which are important
from a system point of view.
The first reason to utilize a buffer/amplifier at the output of a
μPot is to ensure that there are no audible clicks or pops due
to attenuation step changes in the device. If an on-board bi-
polar op amp had been used for the output stage, its require-
ment of a finite amount of DC bias current for operation
would cause a DC voltage “pop” when the output impedance
of the μPot changes. Again, this phenomenon is due to the
fact that the output impedance of the μPot is changing with
step changes and a bipolar amplifier requires a finite amount
of DC bias current for its operation. As the impedance
changes, so does the DC bias current and thus there is a DC
voltage “pop”.
Secondly, the μPot has no drive capability, so any desired
gain
needs
to
be
accomplished
non-inverting amplifer.
Third, the output of a μPot needs to see a high impedance to
prevent loading and subsequent linearity errors from ocur-
ring. A JFET input buffer provides a high input impedance to
the output of the μPot so that this does not occur.
Clicks and pops can be avoided by using a JFET input
buffer/amplifier such as an LF412ACN. The LF412 has a
high input impedance and exhibits both a low noise floor and
low THD+N throughout the audio spectrum which maintains
signal integrity and linearity for the system. The performance
of the system solution is entirely dependent upon the quality
and performance of the JFET input buffer/amplifier.
through
a
buffer/
LOGARITHMIC GAIN AMPUFIER
The μPot is capable of being used in the feedback loop of an
amplifier, however, as stated previously, the output of the
μPot needs to see a high impedance in order to maintain its
high performance and linearity. Again, loading the output will
change the values of attenuation for the device. As shown in
Figure 10 a μPot used in the feedback loop creates a loga-
rithmic gain amplifier. In this configuration the attenuation
levels from Table 1 now become gain levels with the largest
possible gain value being 78dB. For most applications 78dB
of gain will cause signal clipping to occur, however, because
of the μPot’s versatility the gain can be controlled through
programming such that the clipping level of the system is
never obtained. An important point to remember is that when
in mute mode the input is disconnected from the output. In
this configuration this will place the amplifier in its open loop
gain state, thus resulting in severe comparator action. Care
should be taken with the programming and design of this
type of circuit. To provide the best performance, a JFET input
amplifier should be used.
DS011978-11
FIGURE 9. μPot System Architecture
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