參數(shù)資料
型號(hào): LM1851
廠(chǎng)商: National Semiconductor Corporation
英文描述: Ground Fault Interrupter
中文描述: 接地故障遮斷
文件頁(yè)數(shù): 4/8頁(yè)
文件大小: 165K
代理商: LM1851
Typical Performance Characteristics
Average Trip Time vs
Fault Current
Normal Fault Current
Threshold vs R
SET
Output Drive Current vs
Output Voltage
Pin 1 Saturation Voltage vs
External Load Current, I
L
TL/H/5177–4
Circuit Description
(Refer to Block and Connection Diagram)
The LM1851 operates from 26V as set by an internal shunt
regulator, D3. In the absence of a fault (I
f
e
0) the feedback
path status signal (V
S
) is correspondingly zero. Under these
conditions the capacitor discharge current, I
1
, sits quies-
cently at three times its threshold value, I
TH
, so that noise
induced charge on the timing capacitor will be rapidly re-
moved. When a fault current, I
f
, is induced in the secondary
of the external sense transformer, the operational amplifier,
A1, uses feedback to force a virtual ground at the input as it
extracts I
f
. The presence of I
f
during either half-cycle will
cause V
S
to go high, which in turn changes I
1
from 3I
TH
to
I
TH
. Although I
TH
discharges the timing capacitor during
both half-cycles of the line, I
f
only charges the capacitor
during the half-cycle in which I
f
exits pin 2. Thus during one
half-cycle I
f
–I
TH
charges the timing capacitor, while during
the other half-cycle I
TH
discharges it. When the capacitor
voltage reaches 17.5V, the latch engages and turns off Q3
permitting I
2
to drive the gate of an SCR.
4
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