
TL/H/7893–3
FIGURE 2. LM1815 Oscillograms
Application Hints
Input Clamp
The signal input at pin 3 is internally clamped. Current limit
is provided by an external resistor which should be selected
to allow a peak current of 3 mA in normal operation. Positive
inputs are clamped by a 1 k
X
resistor and series diode,
while an active clamp limits pin 3 to
b
350 mV for negative
inputs (see R4, Q12, Q11 in internal schematic diagram).
Operation of Zero Crossing Detector
The LM1815 is designed to operate as a zero crossing de-
tector, triggering an internal one shot on the negative-going
edge of the input signal. Unlike other zero crossing detec-
tors, the LM1815 cannot be triggered until the input signal
has crossed an ‘‘a(chǎn)rming’’ threshold on the positive-going
portion of the waveform. The arming circuit is reset when
the chip is triggered, and subsequent zero crossings are
ignored until the arming threshold is exceeded again. This
threshold varies depending on the connection at pin 5.
Three different modes of operation are possible:
MODE 1, Pin 5 open.
The adaptive mode is selected by
leaving pin 5 open circuit. For input signals of less than
135 mVp-p, the input arming threshold is typically 45 mV.
Under these conditions the input signal must first cross the
45 mV threshold in the positive direction to arm the zero
crossing detector, and then cross zero in the negative direc-
tion to trigger it. If the signal is less than 30 mV peak (mini-
mum rating in Electrical Characteristics), the one shot is
guaranteed to not trigger.
Input signals of greater than 230 mVp-p cause the arming
threshold to track at 80% of the peak input voltage. A peak
detector (pin 7) stores a value relative to the positive input
peaks to establish the arming threshold. Input signals must
exceed this threshold in the positive direction to arm the
zero crossing detector, which can then be triggered by a
negative-going zero crossing. The peak detector tracks rap-
idly as the input signal amplitude increases, and decays by
virtue of the resistor connected externally at pin 7 to track
decreases in the input signal.
Note that since the input is clamped, the waveform ob-
served at pin 3 is not identical to the waveform observed at
the variable reluctance sensor. Similarly, the voltage stored
at pin 7 is not identical to the peak voltage appearing at
pin 3.
MODE 2, Pin 5 connected to V
a
.
The input arming thresh-
old is fixed at 200 mV minimum when pin 5 is connected to
the positive supply. The chip has no output for signals of
less than 200 mV peak, and triggers on the next negative-
going zero crossing when the threshold is exceeded.
MODE 3, Pin 5 grounded.
With pin 5 grounded, the input
arming threshold is set to 0V (
g
25 mV maximum). Positive-
going zero crossings arm the chip, and the next negative
zero crossing triggers it.
The one shot timing is set by a resistor and capacitor con-
nected to pin 14. The output pulse width is
pulse width
e
0.673 RC
In some systems it is necessary to externally generate puls-
es, such as during stall conditions when the variable reluc-
tance sensor has no output. External pulse inputs at pin 9
are gated through to pin 10 when Input Select (pin 11) is
pulled high. Pin 12 is a direct output for the one shot and is
unaffected by the status of pin 11.
(1)
Input/output pins 9, 11, 10 and 12 are all CMOS logic com-
patible. In addition, pins 9, 11 and 12 are TTL compatible.
Pin 10 is not guaranteed to drive a TTL load.
Pins 1, 4, 6 and 13 have no internal connections and can be
grounded.
4